George William Alexander

Delay lock loop having a variable voltage regulator

Implementation of a temperature sensor to control internal chip voltages

Maintaining internal voltages of an integrated circuit in response to a clocked standby mode

Implementation of a fusing scheme to allow internal voltage trimming

Delay lock loop having an edge detector and fixed delay

DQS postamble noise suppression by forcing a minimum pulse length

Disabling clocked standby mode based on device temperature

METHOD AND APPARATUS FOR A DELAY LOCK LOOP

Semiconductor wafer testing system

System and method for monitoring internal voltages on an integrated circuit