Gergely Pintér

Automatic generation of executable assertions for runtime checking temporal requirements

Checking various temporal requirements is a key dependability concern in safety-critical systems. As model-checking approaches do not scale well to systems of high complexity the runtime verification of temporal requirements has received a growing attention recently. This paper presents a code-generation based method for runtime evaluation of linear temporal logic formulae over program execution traces. The processing-power requirements of our solution are much lower than in case of previous approaches enabling its application even in resource-restricted embedded environments.

Modeling and analysis of exception handling by using UML statecharts

Our paper aims at proposing a framework that allows programmers to exploit the benefits of exception handling throughout the entire development chain of Java programs by modeling exception handling in the abstract UML statechart model of the application, enabling the use of automatic model checkers for checking the behavioral model for correctness even in exceptional situations, and utilizing automatic code generators for implementing the Java source of exception-aware statecharts.

A Resilient SIL 2 Driver Machine Interface for Train Control Systems

In railway train-borne equipment, the driver machine interface (DMI) acts like a bridge between the train driver and the onboard automatic train control system (European Vital Computer, EVC). While the DMI is required to operate in a critical context, current DMIs have no safety requirements. This implies that the EVC may automatically stop the train whenever the DMI is suspected to misbehave, leading to delay of the train, inconvenience for passengers and consequent possible profit loss. For these reasons a DMI with higher safety requirements is worth to be taken into account, even if it implies higher costs. The SAFEDMI European project aims at developing (i) a DMI at Safety Integrity Level 2 (SIL 2) using off-the-shelf components and a simple hardware architecture to reduce costs, and (ii) a SIL 2 wireless communication support for maintenance. This paper describes the architecture of a DMI which satisfies these objectives. The main hardware and software characteristics will be shown, including the proposed error detection techniques and the related fault handling (characterized by a new operational mode that allows DMI to restart silently, thus reducing unexpected train stops).

A data mining approach to identify key factors in dependability experiments

Our paper presents a novel approach for identifying the key infrastructural factors determining the behavior of systems in the presence of faults by the application of intelligent data processing methods on data sets obtained from dependability benchmarking experiments. Our approach does not rely on a-priori assumptions or human intuition about the dominant aspects enabling this way the investigation of highly complex COTS-based systems. The proposed approach is demonstrated using a commercial data mining tool from IBM on the data obtained from experiments conducted using the DBench-OLTP dependability benchmark. Results obtained with the proposed technique identified important key factors impacting performance and dependability that could not have been revealed by the dependability benchmark measures.

Runtime verification of statechart implementations

Our paper introduces a runtime verification framework for concurrent monitoring of applications specified by UML statecharts. The approach offers a considerable degree of granularity by (i) enabling the modeler to focus on specific key dependability criteria by defining temporal logic formulae over a behavioral model that is available even in early phases of the development and (ii) by supporting the verification of the final implementation against the fully elaborated UML statechart model. The paper presents an extension of the propositional linear temporal logic that fits to the advanced constructs of UML statecharts and an advanced watchdog scheme for concurrent supervision of program execution based on the statechart specification.

UML based design of time triggered systems

This paper presents how the platform-specific development environment of time-triggered (TT) systems can be integrated with a visual design toolkit based on UML. The built-in facilities of UML and the modeling extensions introduced by us enable the unification of the advantages provided by both the embedded development environment and the UML tools. UML offers visual design, automatic code and documentation generation, while the underlying TT development environment offers platform-specific task and communication scheduling and fault tolerance middleware construction. This results in an integrated system that is capable of supporting the entire development within the framework of the UML tool

Integration of OLAP and data mining for analysis of results from dependability evaluation experiments

This paper proposes the application of On-Line Analytical Processing (OLAP) and data mining approaches to analyse the large amount of raw data collected in fault injection campaigns and dependability benchmarking experiments. We use data warehousing technologies to store raw results from different experiments in a multidimensional structure where raw data can be analysed by means of OLAP tools. Moreover, we present an approach for identifying the key infrastructural factors determining the behaviour of computer systems in the presence of faults by the application of data mining methods on the data sets. Results obtained with the proposed techniques identified important factors impacting performance and dependability that could not have been revealed solely by the benchmark measures.

Impact of statechart implementation techniques on the effectiveness of fault detection mechanisms

This work presents the analysis of an experiment series aiming at the discovery of the impact of two inherently different statechart implementation methods on the behavior of the resulting executables in the presence of faults. The discussion identifies the key features of implementation techniques influencing the effectiveness of standard fault detection mechanisms (memory protection, assertions etc.) and an advanced statechart-level watchdog scheme used for detecting the deviations from the abstract implementation-independent behavioral specification.

ERROR DETECTION IN CONTROL FLOW OF EVENT-DRIVEN STATE BASED APPLICATIONS

This chapter presents two runtime error detection techniques for UML 2.0 statechart implementations. The first technique aims at detecting errors caused by model refinement faults (introduced in early phases of the development) by proposing a temporal logic language to be used for defining and checking temporal correctness criteria on statecharts. The second solution is a watchdog structure aiming at detection of errors caused by implementation faults. The solutions can detect a subset of errors emerging from operational fault as well.