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Dive into the research topics where Gerrit Ary Slavenburg is active.

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Featured researches published by Gerrit Ary Slavenburg.


ieee computer society international conference | 1990

CREATE-LIFE: a modular design approach for high performance ASICs

Junien Labrousse; Gerrit Ary Slavenburg

CREATE-LIFE (Compiler for REgular ArchiTEcture, Long Instruction Format Engine) is an architecture-specific design approach for CMOS VLSI based on block modularity and architecture regularity. It takes as input a description of the function to be performed by a VLSI circuit using general-purpose. Pascal-like programming language and a description of the particular LIFE architecture instance. The output is the CMOS layout of a very high-performance (micro) programmed architecture tailored for that specific function. The LIFE architectures generated in the design environment are the single-chip implementations of an improved form of a very long instruction work (VLIW) architecture that uses both parallelism and pipelining. With this approach, an experimental general-purpose processor which performs in the 50 to 100 VAX equivalent range has been designed.<<ETX>>


international conference on computer design | 1988

CREATE-LIFE: a design system for high performances VLSI circuits

Junien Labrousse; Gerrit Ary Slavenburg

CREATE-LIFE (compiler for regular architecture/long instruction word engine) is an architecture-specific design for CMOS VLSI. The design system takes as input a description of the function to be performed by a VLSI module in a general-purpose, Pascal-like programming language. It then produces the CMOS layout of a very high-performance (micro) programmed architecture tailored for that function. The LIFE architectures generated by the design system are single-chip implementations of an improved form of very long instruction word (VLIW) architecture that uses both parallelism and pipelining.<<ETX>>


Archive | 1990

Data processing module and video processing system incorporating same

Robert Johannes Sluijter; Cornelis Marinus Huizer; Hendrik Dijkstra; Gerrit Ary Slavenburg


Archive | 1996

Method and apparatus for custom operations of a processor

Gerrit Ary Slavenburg; Pieter Sierd van der Meulen; Yong Cho; Vijay K. Mehra; Yen C. Lee


Archive | 1993

VLIW processor which uses path information generated by a branch control unit to inhibit operations which are not on a correct path

Gerrit Ary Slavenburg; Jean-Michel Labrousse


Archive | 1999

VLIW processor with less instruction issue slots than functional units

Gerrit Ary Slavenburg


Archive | 1998

VLIW processor has different functional units operating on commands of different widths

Jos van Eijndhoven; Gerrit Ary Slavenburg; Selliah Rathnam


Archive | 1991

Multiport memory bypass under software control

Jean-Michel Labrousse; Gerrit Ary Slavenburg


Archive | 1991

Processing device including a memory circuit and a group of functional units

Gerrit Ary Slavenburg; Jean-Michel Labrousse


Archive | 1995

Exception recovery in a data processing system

Gerrit Ary Slavenburg; Jean-Michel Labrousse

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