Geza Joos

Design aspects of synchronous PWM rectifier-inverter systems under unbalanced input voltage conditions

The effects of input line voltage unbalance are analyzed, starting with the distortion in the input line currents and extending to the DC bus components and inverter output line voltages and currents. Analytical results are used to obtain system design curves as a function of the input voltage unbalance for all major system components. Key predicted results were verified on a 2 kVA prototype unit.<<ETX>>

Analysis and design of a three-phase synchronous solid-state VAr compensator

A three-phase synchronous solid-state VAr compensator (SSVC) system that uses a three-phase pulsewidth-modulated (PWM) voltage-source inverter is presented and analyzed. The proposed SSVC system can compensate for leading and lagging displacement power factor. Pulsewidth modulation is used as a means of reducing the size of reactive components. The SSVC system is analyzed under self- and independently-controlled DC bus voltage operating conditions. Other areas of investigation include the design of SSVC filter components for both approaches and the closing of the loop around the reactive power command signal. Predicted results are verified experimentally for the case of the SSVC working with a self-controlled DC bus. >

Analysis and design of a series voltage unbalance compensator based on a three-phase VSI operating with unbalanced switching functions

Voltage unbalance in AC supply systems is typically corrected by means of a shunt connected thyristor-controlled static VAr compensator. This approach has the disadvantage of slow response, harmonic injection into the AC system, and the requirement for large passive components. The proposed system consists of a three-phase PWM voltage source inverter, connected in series with the line through a three-phase transformer. The unbalance compensation is achieved by canceling the negative sequence component of the line-to-line voltages of the source. It is also shown that by having the inverter operate with unbalanced switching functions, it is possible to balance the load voltage and to control the amplitude of the positive sequence component in order to perform load voltage regulation. A complete mathematical description of the method is presented, demonstrating that the compensation can be achieved with low kVA inverters and low harmonic injection. Implementation procedures, design equations, and a design example are also included in order to illustrate the proposed method. Experimental results of a 1.5 kVA laboratory prototype system confirm the feasibility of the technique. >

'Dead-band' PWM switching patterns

Reference/modulating waveform continuity is not a necessary condition for the implementation of switching patterns for three-phase pulse-width modulated (PWM) converters if the load or the source are Y-connected. This is based on the fact that the converter phase-voltages do not need to be sinusoidal and switching pattern discontinuities-dead-bands-do not degrade the quality of output/input voltage/current waveforms by introducing low-order harmonics if certain parameters are optimized. This paper discusses general characteristics of various discontinuous switching patterns for PWM converters and shows that they can yield better performance than their continuous counterparts in some operating regions. Performance is defined as harmonic distortion normalized with respect to effective switching frequency and serves as a measure of comparison with continuous PWM techniques, The applications considered include general purpose and application specific solid-state power supplies using voltage source inverters and PWM rectifiers. Theoretical considerations are verified on an experimental unit.

A current-source inverter fed induction motor drive system with reduced losses

Standard low and medium induction power motor drives are based on the PWM voltage source inverter (VSI) fed from a diode rectifier. The dual topology, based on the current source inverter/rectifier structure is used in medium and high power applications. This paper addresses some of the drawbacks of this approach compared to the voltage source approach. The proposed drive features: (a) an on-line operated PWM inverter, using instantaneous output capacitor voltage control based on space vector modulation; (b) a line-synchronized PWM rectifier, with DC bus current control; and (c) an additional inverter modulation index control loop, ensuring a constant inverter modulation index. The resulting advantages include: (a) ruggedness and inherent continuous regeneration capability; (b) near unity global input power factor; (c) reduced motor voltage distortion; (d) reduced DC bus inductor and switch conduction losses; (e) fast motor dynamic response; and (f) elimination of motor circuit resonances. Simulated and experimental results based on a DSP implementation are given.

A two switch high performance current regulated DC/AC converter module

A high-performance current-regulated single-phase DC/AC converter module is proposed. Its features include a two-switch topology with no short-through paths, high output to input voltage gain, low and constant switching frequencies, and practically instantaneous recovery from input or output transients. By utilizing an inner filter capacitor current control loop, the module can maintain nearly perfect sinusoidal output voltages, even with highly nonlinear loads. Three-phase operation can be obtained by using three of these modules. The analysis and design of the converter power and control circuits and the experimental confirmation of key predicted results are presented.<<ETX>>

Analysis and design of a novel 3- phi solid-state power factor compensator and harmonic suppressor system

A novel three-phase solid-state power factor compensation scheme is presented and analyzed. This scheme employs a PWM voltage-source inverter and has two important features. First, it can maintain a near-unity mains input power factor without sensing and computing the associated reactive power component, and second, it can substantially reduce any line current harmonics generated by nonlinear types of load. The proposed scheme is discussed in terms of principles of operation, power system design, and analysis under unbalanced operating conditions. Predicted results are verified experimentally. >

Analysis and design of a series voltage compensator for three-phase unbalanced sources

Voltage unbalance typically present in three-phase AC supply systems adversely affects power system components, static converters, drive systems, electric machines, etc., connected to the system. A method to eliminate this unbalance by means of a voltage compensator connected in series with the supply through transformers is described. The technique is based on extracting the negative sequence voltage component of the supply and canceling it in order to obtain balanced voltages. The positive sequence component is then adjusted to achieve voltage regulation. It is shown that the compensation can be achieved with low kilovolt-ampere inverters and that harmonic injection is reduced to a minimum. The authors include implementation principles, design equations, and a design example. Simulated and experimental results confirm the theoretical concept and feasibility of the proposed system. >

Current source converter on-line pattern generator switching frequency minimization

On-line PWM pattern generators for current source converters offer a number of control advantages over off-line optimized patterns. However, when implemented using the principles applying to voltage source inverter PWM pattern generators, the switching frequency is equal to: (a) the carrier frequency in standard carrier-based implementations and to (b) 2/3 the cycle frequency in space vector implementations. This paper shows that this frequency can be reduced to 1/2 of the respective frequencies. Two pattern generators are investigated: (a) a carrier based technique, namely the modified dead-band technique; (b) a space vector based technique, where the advantage is taken of the extra zero state available in current source converters. It is shown that a significant reduction of AC line current distortion is obtained with the modified dead-band technique for modulation indices greater than 0.4. Furthermore, with the two proposed pattern generators, there is no penalty on the distortion of the DC bus voltage. The principles of operation of the proposed schemes are explained. DSP implementation algorithms of the space vector scheme are given. Experimental results on a 5 kVA current rectifier and a 5 kVA current source inverter confirm the feasibility of the proposed pattern generators, and illustrate the input and output frequency spectra obtained.<<ETX>>

On-line generation of gating signals for current source converter topologies

PWM rectifiers and current source inverters (CSIs) are usually gated using optimized patterns stored in EPROMs. Patterns are therefore mostly of fixed modulation index, since variable modulation index requires storing patterns for a finite numbr of indices. Furthermore, the modulation index can only be changed once per cycle, thus reducing the dynamic response of the system. This paper proposes a technique of generating gating patterns online for CSI topologies based on carrier PWM techniques (PWM rectifiers or inverters). The proposed technique is designed and implemented for the standard three-phase six-switch configuration. It delivers the appropriate gating signals for all switching patterns and modulation indices including overmodulation. It is therefore possible to extend the concept of duality in the power circuit topology between VSIs and CSIs to carrier PWM modulation techniques. In the proposed approach, the requirements imposed on gating signals are satisfied by the appropriate combinations of single phase switching patterns and the introduction of the required complementary and overlap pulses. Implementation in a mixed analog/digital circuit is described and experimental results obtained on a 2 kVA voltage-controlled current source inverter unit are given.<<ETX>>