Giovanni Busatto

Performance analysis of a bipolar mode FET (BMFET) with normally off characteristics

The fabrication and the characterization of a family of power Bipolar Mode JFETs (BMFET) is reported. In these devices, blocking voltages up to 1000 V or currents up to 18 A (corresponding to 800 A/cm2) have been obtained. Results allow to get an insight in the physics of operation of the BMFET, to define their theoretical limits of operation, and to understand the reasons for the superior performance of the present device, with respect to the Bipolar Transistor.

Physical CAD model for high-voltage IGBTs based on lumped-charge approach

A new insulated gate bipolar transistor (IGBT) model developed on a physical basis is presented. The Lumped-Charge method has been revised in order to point out a more general methodology for implementing the model into a circuit form. As an example, a version of the model for the popular PSPICE simulator is presented. The N-channel IGBT structure is described by means of an evolution of the PSPICE level-1 metal oxide semiconductor field effect transistor model. An accurate mobility model has been included to precisely predict the voltage drop in the ON state. Simulation results agree well with the experiments both in static and in switching operations. The comparison between the proposed and the native IGBT PSPICE model shows the better behavior of the former. The reasons for this result have been verified by means of two-dimensional MEDICI simulations. Moreover, the proposed model is able to predict the device behavior also in critical operations like its latchup during a turn-off under short-circuit conditions.

MAGFET based current sensing for power integrated circuit

Abstract A new on-chip non-invasive integrated current sensing, compatible with standard CMOS technology, has been developed, using a 1.2 μm BiCMOS ALCATEL technology, to sense the current in the drain side of a power MOSFET. The circuit is based on a split-drain magnetic sensor, implemented on the same chip of an integrated gate driver for a power MOSFET. A CMOS biasing circuit with a differential current output is also developed. The simulation results of the current sensing show a conversion gain of 1.25 mV/mT.

Non-destructive high temperature characterisation of high-voltage IGBTs☆

An experimental investigation about the behaviour of 3300V – 1200A IGBT modules both at high temperature and for large output currents is presented. The real IGBT turn off limits in terms of maximum switchable current and the short circuit behaviour at larger different environmental temperatures are identified. The experimental study has been performed by means of a non-destructive experimental set-up where IGBT modules are switched on an inductive load in presence of a protection circuit. It is activated at the occurrence of a dangerous operating conditions thus preventing the IGBT module failure.

Power converters for future LHC experiments

The paper describes power switching converters suitable for possible power supply distribution networks for the upgraded detectors at the High Luminosity LHC collider. The proposed topologies have been selected by considering their tolerance to the highly hostile environment where the converters will operate as well as their limited electromagnetic noise emission. The analysis focuses on the description of the power supplies for noble liquid calorimeters, such as the Atlas LAr calorimeters, though several outcomes of this research can be applied to other detectors of the future LHC experiments. Experimental results carried on demonstrators are provided.

Experimental and numerical investigation about SEB/SEGR of power MOSFET

We present a 3-D simulation analysis related to an experimental study which clarifies the role played by the parasitic BJT activation on the interaction between generated charge and electric field during ion impact in SEB/SEGR of power MOSFET. This activation is caused by the movement of the holes deposited during the ion impact and gives rise to a huge amount of charge that is sustained by avalanche multiplication. During SEGR phenomena this generated charge interact with the high electric field that is formed underneath the gate oxide thus causing damages to it. During SEB phenomena the generated charge causes a double injection phenomenon to take place that induces an electrical instability and, then, the MOSFET destruction.

Developments on DC/DC converters for the LHC experiment upgrades

Prototypes of DC/DC power and Point of Load (PoL) converters were designed and built with the aim of satisfying the foreseen working parameters of the High Luminosity (HL) LHC experiments, using both Silicon (Si) MOSFETs and/or more recent devices substantiated of better power performance, like Silicon Carbide (SiC) and Gallium Nitride (GaN) transistors. Optimization of their design, based on the comparison between the simulated and measured thermal, electrical and mechanical performance, is in progress, and many improvements with respect to the previous versions are under implementation. We discuss in this paper the results of the last modifications. In addition, many tens of discrete component samples, chosen among the devices commercially available in the three different technologies (Si, SiC and GaN), were electrically characterized and tested under γ-rays, neutron, proton and heavy ion radiation, also using a combined run method. We have also planned to test some commercial DC/DCs under the extreme conditions of radiation and magnetic field expected in the upgrades of the LHC experiments. Here we show the first results on few samples.

Recombination measurement of n-type heavily doped layer in high/low silicon junctions

The hole lifetime within a heavily doped n/sup +/ region has been determined using a measurement technique which evaluates the effective recombination velocity of n-n/sup +/ interfaces. The recombination model of a high/low junction is reviewed. The experiment is described. The measurement results are presented and discussed. Measurements of n/sup +/ layers of different types, like substrates, implanted buried layers, and diffused layers, suggest that the minority-carrier lifetime of such regions can be strongly degraded by the device fabrication processes. Results are consistent with the Shockley-Reed-Hall (SRH) lifetime value, which is two orders of magnitude lower than previously published values for bulk material. >

Reliability oriented design of power supplies for high energy physics applications

Abstract The paper describes the design of switching converters suitable for power supply application in the LHC proton accelerator, in operation since 2010 at the European Organization for Nuclear Research (CERN) in Geneva (Switzerland). Experiments running at LHC must reliably operate in a harsh environment, due to radiation, high magnetic fields, and stringent thermal constraints. The followed approach takes into account the very tight reliability requirements during all the design stages, from the choice of circuit topologies and radiation hard power components, to the thermal layout and material optimization. Results carried out on prototypes are reported.

Power supply distribution system for calorimeters at the LHC beyond the nominal luminosity

This paper investigates the use of switching converters for the power supply distribution to calorimeters in the ATLAS experiment when the Large Hadron Collider (LHC) will be upgraded beyond the nominal luminosity. Due to the highly hostile environment the converters must operate in, all the main aspects are considered in the investigation, from the selection of the switching converter topologies to the thermal analysis of components and PCBs, with attention to reliability issues of power devices subject to ionizing radiations. The analysis focuses on the particular, but crucial, case of the power supplies for calorimeters, though several outcomes of the research can profitably be applied to other detectors like muon chambers.