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Dive into the research topics where Giovanni Chiola is active.

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Featured researches published by Giovanni Chiola.


Performance Evaluation | 1995

GreatSPN 1.7: graphical editor and analyzer for timed and stochastic Petri nets

Giovanni Chiola; Giuliana Franceschinis; Rossano Gaeta; Marina Ribaudo

This paper describes the GreatSPN 1.7 package for the modeling, validation, and performance evaluation of distributed systems using Generalized Stochastic Petri Nets and their colored extension. The tool provides a friendly framework to experiment with timed Petri net based modeling techniques. It implements efficient analysis algorithms to allow its use on “real” applications, not only toy examples. Developed in a university for non-profit purposes, it is distributed free of charge to other universities for educational and research purposes. An overview of the complete architecture of the package is given together with examples of its application. Then the various analysis and simulation modules are described.


Theoretical Computer Science | 1997

A symbolic reachability graph for coloured Petri nets

Giovanni Chiola; Claude Dutheillet; Giuliana Franceschinis; Serge Haddad

Coloured Petri nets are well suited to the modelling of symmetric systems. Model symmetries can be usefully exploited for the sake of analysis efficiency as well as for modelling convenience. We present a reduced reachability graph called symbolic reachability graph that enjoys the following properties: (1) it can be constructed directly by an efficient algorithm without considering the actual state space of the model; (2) it can be substantially smaller than the ordinary reachability graph; (3) its analysis provides equivalent results as the analysis of the ordinary reachability graph. The construction procedure for the symbolic reachability graph is completely effective in the case of a syntactically restricted class of coloured nets called “well-formed nets”, while for the unrestricted case of coloured nets some procedures may not be easily implementable in algorithmic form.


parallel computing | 2000

Efficient parallel processing on low-cost clusters with GAMMA active ports

Giovanni Chiola; Giuseppe Ciaccio

Abstract The Genoa Active Message MAchine (GAMMA) is an efficient communication layer for 100base-T clusters of Personal Computers under the Linux operating system (OS). It is based on Active Ports, a communication mechanism derived from Active Messages. Active Ports share most of the low-level optimization opportunities with Generic Active Messages while offering a higher-level programming interface not only in the SPMD but also in the MIMD and client/server paradigms. In addition to point-to-point communications, multi-cast, barrier synchronization, scatter, and gather primitives have also been developed based on Active Ports and exploiting shared 100base-T LAN technology in an optimal way. GAMMA Active Ports deliver excellent communication performance at the user level (latency 13 μ s, maximum throughput 12.2 MByte/s, half-power point reached with 200 byte long messages), thus enabling cost-effective cluster computing on 100base-T. Despite being implemented at the kernel level in the Linux OS, performance numbers of GAMMA Active Ports are much better than many other LAN-oriented communication layers, including so called “user-level” ones (e.g. U-Net). Some code porting efforts have already shown that several applications are reasonably easy to develop on top of GAMMA and that they can actually take advantage of the efficient point-to-point as well as collective communication primitives offered by our prototype library implementation. A porting of the MPICH higher-level interface atop GAMMA is currently under way.


International Journal of Trust Management in Computing and Communications | 2013

Slow DoS attacks: definition and categorisation

Enrico Cambiaso; Gianluca Papaleo; Giovanni Chiola; Maurizio Aiello

Denial of service (DoS) attacks evolved and consolidated as severe security threats to network servers, not only for internet service providers but also for governments. Earlier DoS attacks involved high-bandwidth flood-based approaches exploiting vulnerabilities of networking and transport protocol layers. Subsequently, distributed DoS attacks have been introduced amplifying not only the overall attack bandwidth but also the attack source, thus eluding simple counter measures based on source filtering. Current low bit-rate approaches, instead, exploit vulnerabilities of application layer protocols to accomplish DoS or DDoS attacks. Slow DoS attacks like, e.g., slowloris are particularly dangerous because they can bring down a well equipped server using small attacker’s bandwidth, hence they can effectively run on low performance hosts, such as routers, game consoles, or mobile phones. In this paper, we study slow DoS attacks, analysing in detail the current threats and presenting a proper definition and categorisation for such attacks. Hopefully, our work will provide a useful framework for the study of this field, for the analysis of network vulnerabilities, and for the proposal of innovative intrusion detection methodologies.


european pvm mpi users group meeting on recent advances in parallel virtual machine and message passing interface | 2000

GAMMA and MPI/GAMMA on Gigabit Ethernet

Giuseppe Ciaccio; Giovanni Chiola

The Genoa Active Message MAchine (GAMMA) is a light-weight communication system based on the Active Ports paradigm, originally designed for efficient implementation over low-cost Fast Ethernet interconnects. A very efficient porting of MPICH atop GAMMA as been recently completed, providing unprecedented messaging performance over the cheapest cluster computing technology currently available. In this paper we describe the recently completed porting of GAMMA to the GNIC-II Gigabit Ethernet adapters by Packet Engines. A combination of less than 10 µs latency and more than 93 MByte/s throughput demonstrates the possibility for Gigabit Ethernet and GAMMA to yield messaging performance comparable to the ones from many lightweight protocols running on Myrinet. This result is of interest, given the envisaged drop in cost of Gigabit Ethernet due to the forthcoming transition from fiber optic to UTP cabling and ever increasing mass market production of such standard interconnect.


local computer networks | 2003

Using a Gigabit Ethernet cluster as a distributed disk array with multiple fault tolerance

A. Di Marco; Giovanni Chiola; Giuseppe Ciaccio

A cluster of PCs can be seen as a collection of networked low cost disks; such a collection can be operated by proper software so as to provide the abstraction of a single, larger block device. By adding suitable data redundancy, such a disk collection as a whole could act as single, highly fault tolerant, distributed RAID device, providing capacity and reliability along with the convenient price/performance typical of commodity clusters. We report about the design and performance of DRAID, a distributed RAID prototype running on a Gigabit Ethernet cluster of PCs. DRAID offers storage services under a single I/O space (SIOS) block device abstraction. The SIOS feature implies that the storage space is accessible by each of the stations in the cluster, rather than throughout one or few end-points, with a potentially higher aggregate I/O bandwidth and better suitability to parallel I/O.


modeling analysis and simulation on computer and telecommunication systems | 1995

Performance comparable design of efficient synchronization protocols for distributed simulation

Giovanni Chiola; Alois Ferscha

A large number of variations of distributed simulation protocols have been proposed in the literature. Their performances, however, could not be compared directly, due to different implementation strategies, different optimizations and different software environments as well as parallel hardware platforms. To rank the protocols accurate enough with respect to their execution performance the only practical evaluation, consists in implementing different alternatives and measure their relative performance on significant test cases. In this paper we demonstrate the possibility of simultaneous implementation of the three substantially different protocols starting from a single program skeleton. A clear separation of the simulation part and the synchronisation part of the protocols and reuse of code for more than one variant are the key concepts.<<ETX>>


Theory of Computing Systems \/ Mathematical Systems Theory | 2009

Degree-Optimal Routing for P2P Systems

Giovanni Chiola; Gennaro Cordasco; Luisa Gargano; Mikael Hammar; Alberto Negro; Vittorio Scarano

AbstractnWe define a family of Distributed Hash Table systems whose aim is to combine the routing efficiency of randomized networks—e.g. optimal average path length O(logu20092n/δlogu2009δ) with δ degree—with the programmability and startup efficiency of a uniform overlay—that is, a deterministic system in which the overlay network is transitive and greedy routing is optimal. It is known that Ω(logu2009n) is a lower bound on the average path length for uniform overlays with O(logu2009n) degree (Xu et al., IEEE J. Sel. Areas Commun. 22(1), 151–163, 2004).nnOur work is inspired by neighbor-of-neighbor (NoN) routing, a recently introduced variation of greedy routing that allows us to achieve optimal average path length in randomized networks. The advantage of our proposal is that of allowing the NoN technique to be implemented without adding any overhead to the corresponding deterministic network.nnWe propose a family of networks parameterized with a positive integer c which measures the amount of randomness that is used. By varying the value c, the system goes from the deterministic case (c=1) to an “almost uniform” system. Increasing c to relatively low values allows for routing with asymptotically optimal average path length while retaining most of the advantages of a uniform system, such as easy programmability and quick bootstrap of the nodes entering the system.nnWe also provide a matching lower bound for the average path length of the routing schemes for any c.n


parallel computing | 1998

Fast Barrier Synchronization on Shared Fast Ethernet

Giovanni Chiola; Giuseppe Ciaccio

Shared LAN is presently the most widespread networking technology, due to its extremely low cost and favourable cost/performance ratio. Clusters of Personal Computers (PCs) leveraging shared 100base-T Ethernet may currently offer the best price/performance in parallel processing. Most numerical parallel algorithms make heavy use of collective communications and especially barrier synchronization. Hence a critical issue on PC clusters is to offer efficient implementations of such primitives even though using low-cost, non-switched LAN technology. We implemented and studied some simple barrier synchronization protocols atop the Genoa Active Message MAchine (GAMMA), an efficient Active Messages-like communication layer running on a cluster of Pentium PCs connected by a 100base-TX Ethernet repeater hub. In the case of synchronized or quasi-synchronized processes issuing a barrier synchronization, an obvious way to avoid collisions on shared 100base-T Ethernet is to use a barrier protocol which explicitly serializes all the inter-process synchronization communications over the LAN. We propose alternative barrier protocols which avoid Ethernet collisions during the synchronization phase without requiring such a full explicit serialization. One of such protocols definitely outperforms the fully serialized barrier protocol over 100base-T Ethernet as well as the MPI implementations of barrier synchronization on IBM SP2 and Intel Paragon.


international workshop on petri nets and performance models | 1995

Efficient simulation of SWN models

Rossano Gaeta; Giovanni Chiola

Coloured Petri nets are a powerful formalism for the description of complex, asynchronous distributed systems. They can express in a very concise way the behaviour of very large system especially in case these systems are composed of many replications of a few basic components that individually behave in a similar way. The simulation of such models is however difficult to perform in a computationally efficient way. For the specific class of well formed stochastic nets (SWN) we present a set of techniques that allow a very efficient implementation of the event-driven simulation approach. Two approaches are followed to improve simulation efficiency: first, reduction of the amount of work needed to schedule or preempt the occurrence of a transition as a consequence of a marking change, taking into account the restrictions on colour functions for the WN formalism; second, reduction of the average length of the event list in the case of symmetric models where the so called symbolic simulation technique applies. The approach is validated by performance measurements on several large SWN models taken from the literature.

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Gennaro Cordasco

Seconda Università degli Studi di Napoli

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Luigi V. Mancini

Sapienza University of Rome

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Maurizio Aiello

National Research Council

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