Goncalo Martins

Enabling intelligent unmanned vehicles through XMOS Technology

In this paper we describe a new design for intelligent unmanned vehicles using the XMOS processor and related technology. The current unmanned system design paradigm generally uses widely available microcontroller platforms such as PIC from Microchip, ARM microcontrollers, x86 architectures, among others. These technologies have pros and cons, but one common disadvantage is the complexity of handling multiple I/O streams while simultaneously engaging in complex computational tasks required for intelligent behavior. The conventional approach combines several types of microprocessors together to achieve simultaneous processing at different levels, a design choice that increases the overall complexity of the system by requiring glue logic and more off-chip communication. The proposed platform overcomes this limitation by unifying the high-level processing with the low-level, real-time control required for vehicle control using the XMOS technology, a new event-driven parallel processor for embedded systems. In this paper, we describe the overall design of our ground and aerial vehicles built around the XMOS processor, and present case-study analyses of the systems.

Low cost method to reproduce sound with FPGA

This paper presents a detailed description of the preliminary work on assessment of the idea: incorporate sound reproduction on FPGA (field programmable gate array) without needing extra active electronics. The sound is reproduced using only two digital output bits filtered by a proper designed RC network. The sound data is stored on an external serial memory (MMC or EEPROM) and prepared by specific software, RC sound coder. A soda-machine, with user interface speech enabled, was selected as a concrete implementation example where all the control can be performed on a FPGA. The test application uses about 3800-gate corresponding to 1,9% of the Xilinx Spartan-3 XC3S200 FPGA. Besides soda-machines, there are other applications demanding low cost implementations where this approach can be used, for instance the toyspsila industry.

Towards a systematic threat modeling approach for cyber-physical systems

Cyber-Physical Systems (CPS) are systems with seamless integration of physical, computational and networking components. These systems can potentially have an impact on the physical components, hence it is critical to safeguard them against a wide range of attacks. In this paper, it is argued that an effective approach to achieve this goal is to systematically identify the potential threats at the design phase of building such systems, commonly achieved via threat modeling. In this context, a tool to perform systematic analysis of threat modeling for CPS is proposed. A real-world wireless railway temperature monitoring system is used as a case study to validate the proposed approach. The threats identified in the system are subsequently mitigated using National Institute of Standards and Technology (NIST) standards.

A case for I/O response benchmarking of microprocessors

The main goal of this paper is to describe a new methodology to evaluate the I/O responsiveness of microprocessors. This addresses the need for benchmarks for real-time systems that measure critical properties for system design that are not currently handled by traditional performance benchmarks. The benchmark developed under this methodology is tested on three microprocessor architectures: ARM, PIC and XMOS. The results of the benchmarks show that the response latency of systems can vary significantly between architectures and under different system loads.

Software and attack centric integrated threat modeling for quantitative risk assessment

One step involved in the security engineering process is threat modeling. Threat modeling involves understanding the complexity of the system and identifying all of the possible threats, regardless of whether or not they can be exploited. Proper identification of threats and appropriate selection of countermeasures reduces the ability of attackers to misuse the system. This paper presents a quantitative, integrated threat modeling approach that merges software and attack centric threat modeling techniques. The threat model is composed of a system model representing the physical and network infrastructure layout, as well as a component model illustrating component specific threats. Component attack trees allow for modeling specific component contained attack vectors, while system attack graphs illustrate multi-component, multi-step attack vectors across the system. The Common Vulnerability Scoring System (CVSS) is leveraged to provide a standardized method of quantifying the low level vulnerabilities in the attack trees. As a case study, a railway communication network is used, and the respective results using a threat modeling software tool are presented.

Computation and Communication Evaluation of an Authentication Mechanism for Time-Triggered Networked Control Systems

In modern networked control applications, confidentiality and integrity are important features to address in order to prevent against attacks. Moreover, network control systems are a fundamental part of the communication components of current cyber-physical systems (e.g., automotive communications). Many networked control systems employ Time-Triggered (TT) architectures that provide mechanisms enabling the exchange of precise and synchronous messages. TT systems have computation and communication constraints, and with the aim to enable secure communications in the network, it is important to evaluate the computational and communication overhead of implementing secure communication mechanisms. This paper presents a comprehensive analysis and evaluation of the effects of adding a Hash-based Message Authentication (HMAC) to TT networked control systems. The contributions of the paper include (1) the analysis and experimental validation of the communication overhead, as well as a scalability analysis that utilizes the experimental result for both wired and wireless platforms and (2) an experimental evaluation of the computational overhead of HMAC based on a kernel-level Linux implementation. An automotive application is used as an example, and the results show that it is feasible to implement a secure communication mechanism without interfering with the existing automotive controller execution times. The methods and results of the paper can be used for evaluating the performance impact of security mechanisms and, thus, for the design of secure wired and wireless TT networked control systems.

Search methodologies for node recovery in robotic swarms

Groups of autonomous robots become increasingly useful as the mission complexity they can handle increases. However, in a mobile ad hoc network, there are continually communication failures due to changing environmental conditions and of course hardware problems, both temporary and permanent. For this work, we envision a heterogeneous robotic swarm with both “general” nodes that perform mission tasks, and “support” nodes that help maintain the connectivity of the communication network. At any given time, there are likely to be multiple network link failures, so the placement of support nodes becomes an optimization problem: where will the support nodes be most effective. In a realistic scenario, this optimization problem would be solved constantly as robots move around and the network topology changes, so the technique used must be both efficient, and close to optimal. This paper describes the study of three optimization methods - particle swarm optimization, hill climbing, and tabu search to solve this problem. We find that particle swarm optimization provides the best solutions, but takes a little bit more time to execute than tabu search or hill climbing.

Performance evaluation of secure industrial control system design: A railway control system case study

Industrial control systems (ICS) are composed of sensors, actuators, control processing units, and communication devices all interconnected to provide monitoring and control capabilities. Due to the integral role of the networking infrastructure, such systems are vulnerable to cyber attacks. Indepth consideration of security and resilience and their effects to system performance are very important. This paper focuses on railway control systems (RCS), an important and potentially vulnerable class of ICS, and presents a simulation integration platform that enables (1) Modeling and simulation including realistic models of cyber and physical components and their interactions, as well as operational scenarios that can be used for evaluations of cybersecurity risks and mitigation measures and (2) Evaluation of performance impact and security assessment of mitigation mechanisms focusing on authentication mechanisms and firewalls. The approach is demonstrated using simulation results from a realistic RCS case study.

Coordination-free deterministic communication for embedded system using the BBC encoding

A major problem in the field of communication is the management of the shared transmission medium. For example, if multiple radios are transmitting simultaneously on the same frequency the signals may overlap, leading to interference. Some wireless techniques require the sender to sense before transmitting, introducing non-determinism as they wait a random delay before trying again. In real-time systems, unpredictable delays are undesirable and numerous techniques have been developed to organize the behavior of transmitters to eliminate this problem. Existing techniques to eliminate “sense-before-send” rely on cooperation and coordination among all senders. The technique demonstrated in this paper uses the BBC encoding scheme to achieve deterministic wireless communications. With this technique, senders can transmit without regard for the state of the medium or coordination with other senders, and receivers can tease apart messages sent simultaneously with a high probability of success. We evaluate implementations of the technique in a wired environment using a simple unmanaged, single-wire bus, and also a wireless implementation with a simple AM radio.

Performance evaluation of an authentication mechanism in time-triggered networked control systems

An important challenge in networked control systems is to ensure the confidentiality and integrity of the message in order to secure the communication and prevent attackers or intruders from compromising the system. However, security mechanisms may jeopardize the temporal behavior of the network data communication because of the computation and communication overhead. In this paper, we study the effect of adding Hash Based Message Authentication (HMAC) to a time-triggered networked control system. Time Triggered Architectures (TTAs) provide a deterministic and predictable timing behavior that is used to ensure safety, reliability and fault tolerance properties. The paper analyzes the computation and communication overhead of adding HMAC and the impact on the performance of the time-triggered network. Experimental validation and performance evaluation results using a TTEthernet network are also presented.