Graham Gough

METATEM: a framework for programming in temporal logic

In this paper we further develop the methodology of temporal logic as an executable imperative language, presented by Moszkowski [Mos86] and Gabbay [Gab87, Gab89] and present a concrete framework, called MetateM for executing (modal and) temporal logics. Our approach is illustrated by the development of an execution mechanism for a propositional temporal logic and for a restricted first order temporal logic.

MetateM: An introduction

In this paper a methodology for the use of temporal logic as an executable imperative language is introduced. The approach, which provides a concrete framework, calledMetateM, for executing temporal formulae, is motivated and illustrated through examples. In addition, this introduction provides references to further, more detailed, work relating to theMetateM approach to executable logics.

Advances in temporal logic

A Hierarchy of Modal Event Calculi: Expressiveness and Complexity I. Cervesato, et al. Release Logics for Temporalizing Dynamic Logic J. Krabbendam, J.-J. Meyer. Compositional Verification of Timed Statecharts F. Levi. Temporal Logic for Stabilizing Systems Y. Lakhnech, M. Siegel. Decidable Theories of omega-Layered Metric Temporal Structures A. Montanari, et al. Synthesis with Incomplete Information O. Kupferman, M. Vardi. Deductive Verification of Parameterized Fault-Tolerant Systems: A Case Study N.S. Bjorner, et al. Using Otter for Temporal Resolution C. Dixon. Guiding Clausal Temporal Resolution M. Fisher, C. Dixon. Determinism and the Origins of Temporal Logic T. Brauner, et al. Modelling Linguistic Events M. Leith, J. Cunningham. A Dynamic Temporal Logic for Aspectual Phenomena in Natural Language R. Naumann. A Decidable Temporal Logic for Temporal Propositions I. Pratt, N. Francez. Transitions in Continuous Time, with an Application to Qualitative Changes in Spatial Relations A. Galton. A Modal Logic of Durative Actions I. Nunes, et al. About Real Time, Calendar Systems and Temporal Notions H.J. Ohlbach. A Model Checking Algorithm for pi-Calculus Agents S. Gnesi, G. Ristori. Interleaving Model and Verification of Distributed Probabilistic Real-Time Systems T. Luo, et al. Constructive Interval Temporal Logic in Alf S. Thompson. Two-dimensional Executable Temporal Logic for Bitemporal Databases M. Finger, M. Reynolds. Execution and Proof in a Horn-Clause Temporal Logic C. Dixon, et al. Specification and Prototyping of Structures Multimedia Documents using Interval Temporal Logic H. Bowman, et al.

A Process Algebra Foundation for Reasoning about Core ELLA

A process algebraic foundation has been developed for formal analysis of synchronous hardware designs represented through the commercially available hardware design language, ELLA. An underlying semantic foundation, based on input/output trace sets, is presented first through the use of state machines. Such a representation enables direct application of standard, fully automated trace equivalence checking tools. However, to overcome the computational limitations imposed by such analysis methods, the input/ output trace semantics is represented through a synchronous process algebra, EPA. Primitive processes in EPA denote the behaviour of primitive hardware components, such as delays or multiplexers, with composition operators corresponding to the different ways in which behaviours may be built. Of particular significance is the parallel composition operator which captures the machinery for building networks from other components/networks. Actions in EPA are structured and signify the state of input and output signals. This structure, however, is abstracted by developing an algebra for the actions. In particular, parallel composition on processes neatly lifts to a special (synchronous) product operation on actions. The EPA representation forms a good basis for semi-automated high-level symbolic manipulation and reasoning tools. First, the original design structure can be maintained, thus easing the problems of user level feedback from tools. Secondly, the application of EPA to ELLA enables a deterministic finite automation form for EPA terms. This provides a route to tractable symbolic verification and simulation, using a state evolution method to establish strong bisimulation properties. The method has been successfully applied to classes of unbounded state space systems.

Fair SMG and Linear Time Model Checking

SMG [GB88] is a system designed to generate a finite state model of a program from the program itself and an operational semantics for the programming language. Model-checking can then be used to verify that the program satisfies a set of desired temporal properties.

Efficient CTL* model checking for analysis of rainbow designs

We describe an efficient implementation of a CTL* model-checking algorithm based on alternating automata. We use this to check properties of an asynchronous micropipeline design described in the Rainbow framework, which operates at the micropipeline level and leads to compact models of the hardware. We also use alternating automata to characterise the expressive power and model-checking complexity for sub-logics of CTL*.

Abstract modelling of asynchronous micropipeline systems using Rainbow

We consider Sutherland’s Micropipeline methodology for asynchronous hardware systems and highlight problems of design representation. The Rainbow hardware design framework supports such description, simulation and analysis of micropipeline systems. It provides a set of sub-languages each offering a different description style. Components described in the different sub-languages can be fully integrated within a single design. The framework offers abstract design description and rapid simulation at a high level for early simulation and analysis.

A design and verification environment for ELLA

We describe a fully integrated design environment for the Hardware Description Language ELLA, which provides formal verification support to the hardware engineer. The environment includes both conventional hardware design tools, and special purpose tools for ELLA-level design transformation, symbolic simulation and formal verification. All tools operate from an underlying formal semantic representation of ELLA. The operation of the various tools is described from the user viewpoint via a simple design example.

Languages, Meta-languages and METATEM, A Discussion Paper

Metalanguages are vital to the development and usage of formal systems, and yet the nature of metalanguages and associated notions require clarification. Here we attempt to provide a clear definition of the requirements for a language to be a meta-l&nguage, together with consideration of issues of proof theory, model theory and interpreters for such a language.

Symbolic verification of hardware systems

We describe a method for verifying the behavioural equivalence of hardware systems, modelled as deterministic machines, based on the symbolic simulation of the two systems. The state evolution method compares the behaviour of systems at an abstract level, and reduces the problem of checking the behavioural equivalence to one of needing to prove that a set of logical verification conditions are valid. The approach maintains a high degree of automation while offering the possibility of containing the usual growth in complexity of verification, and can be applied to certain systems which have infinite state-spaces.