Gregg Higashi

27.6% Conversion efficiency, a new record for single-junction solar cells under 1 sun illumination

Alta Devices, Inc. has fabricated a thin-film GaAs device on a flexible substrate with an independently-confirmed solar energy conversion efficiency of 27.6%, under AM1.5G solar illumination at 1 sun intensity. This represents a new record for single-junction devices under non-concentrated sunlight. This surpasses the previous record, for conversion efficiency of a single-junction device under non-concentrated light, by more than 1%. This is due largely to the high open-circuit voltage (Voc) of this device. The high Voc results from precise control of the dark current. The fact that this record result has been achieved with a thin-film shows that, for GaAs material systems, the majority of the growth substrate is not needed for device performance. This allows one to consider amortizing the potentially high cost of a GaAs growth substrate by growing a thin-film, lifting it off, and reusing the same substrate multiple times. This technology therefore has the potential to be a novel high-performance, thin-film option for terrestrial photovoltaics.

Flexible Thin-Film Tandem Solar Cells With >30% Efficiency

Alta Devices, Inc. has previously reported on single-junction thin-film GaAs photovoltaic devices on flexible substrates with efficiencies up to 28.8% under AM1.5G solar illumination at 1-sun intensity. Here, we show that the same technology platform can be extended to tandem devices that are capable of even higher efficiencies: so far up to 30.8%. Specifically, here, we report on a lattice-matched, series-connected, two-junction device with InGaP as the light-absorbing material of the top cell and GaAs as the absorber in the bottom cell. The material is grown by metallorganic chemical vapor deposition, and then, the device is lifted off by the epitaxial liftoff (ELO) process, as previously reported. This demonstrates that ELO is not only capable of record-setting single-junction performance but capable of achieving world-class efficiency with a multijunction architecture as well.

Manufacturing multilevel metal CMOS with deuterium anneals for improved hot-carrier reliablility

This paper discuses new experimental findings critical for process integration of deuterium post-metal anneals to manufacturing multi-level metal CMOS integrated circuits. Detailed account of the optimization experiments using the deuterium process is given varying temperature (400 - 450 C), time (0.5 - 5 hr), and ambient (10 - 100% D2). It is shown that the deuterium/hydrogen isotope effect is a general property of MOS wear-out by evaluating many transistor structures from various CMOS technologies. Physical insight into the transistor degradation mechanisms is provided via fundamental STM Si-H(D) desorption experiments and physics based simulations.