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Dive into the research topics where Gregory K. Chen is active.

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Featured researches published by Gregory K. Chen.


design, automation, and test in europe | 2009

A highly resilient routing algorithm for fault-tolerant NoCs

David Fick; Andrew DeOrio; Gregory K. Chen; Valeria Bertacco; Dennis Sylvester; David T. Blaauw

Current trends in technology scaling foreshadow worsening transistor reliability as well as greater numbers of transistors in each system. The combination of these factors will soon make long-term product reliability extremely difficult in complex modern systems such as systems on a chip (SoC) and chip multiprocessor (CMP) designs, where even a single device failure can cause fatal system errors. Resiliency to device failure will be a necessary condition at future technology nodes. In this work, we present a network-on-chip (NoC) routing algorithm to boost the robustness in interconnect networks, by reconfiguring them to avoid faulty components while maintaining connectivity and correct operation. This distributed algorithm can be implemented in hardware with less than 300 gates per network router. Experimental results over a broad range of 2D-mesh and 2D-torus networks demonstrate 99.99% reliability on average when 10% of the interconnect links have failed.


international solid-state circuits conference | 2011

A cubic-millimeter energy-autonomous wireless intraocular pressure monitor

Gregory K. Chen; Hassan Ghaed; Razi-ul Haque; Michael Wieckowski; Yejoong Kim; Gyouho Kim; David Fick; Daeyeon Kim; Mingoo Seok; Kensall D. Wise; David T. Blaauw; Dennis Sylvester

Circuit blocks for a 1.5 mm3 microsystem enable continuous monitoring of intraocular pressure. Due to power and form-factor limitations, circuit blocks are designed at nanowatt power levels not completely explored before. The system includes a 75% efficient 90 nW DC-DC converter which is the most efficient reported sub- μW converter in literature. It also includes a novel 4.7 nJ/bit FSK radio that achieves 10 cm of transmission range at 10 -6 BER which is also the lowest number reported for short-range through-tissue wireless links for biomedical implants. A MEMS capacitive sensor and ΣΔ capacitance-to-digital converter measure IOP with 0.5 mmHg accuracy. A microcontroller processes and saves IOP data and stores it in a 2.4 fW/bitcell SRAM. The microsystem harvests a maximum power of 80 nW in sunlight with a light irradiance of 100 mW/cm2 AM 1.5 from an integrated 0.07 mm2 solar cell to recharge a 1 mm2 1 μAh thin-film battery and power the load circuits. The design achieves zero-net-energy operation with 1.5 hours of sunlight or 10 hours of bright indoor lighting daily.


international solid-state circuits conference | 2010

Millimeter-scale nearly perpetual sensor system with stacked battery and solar cells

Gregory K. Chen; Matthew Fojtik; Daeyeon Kim; David Fick; Junsun Park; Mingoo Seok; Mao-Ter Chen; Zhiyoong Foo; Dennis Sylvester; David T. Blaauw

Sensors with long lifetimes create new applications in medical, infrastructure and environmental monitoring. Due to volume constraints, sensor systems are often capable of storing only small amounts of energy. Several systems have increased lifetime through VDD scaling [1][2][3]. This necessitates voltage conversion from higher-voltage storage elements, such as batteries and fuel cells. Power is reduced by introducing ultra-low-power sleep modes during idle periods. Sensor lifetime can be further extended by harvesting from solar, vibrational and thermal energy. Since the availability of harvested energy is sporadic, it must be detected and stored. Harvesting sources often do not provide suitable voltage levels, so DC-DC up-conversion is required.


IEEE Transactions on Very Large Scale Integration Systems | 2010

Yield-Driven Near-Threshold SRAM Design

Gregory K. Chen; Dennis Sylvester; David T. Blaauw; Trevor N. Mudge

Voltage scaling is desirable in static RAM (SRAM) to reduce energy consumption. However, commercial SRAM is susceptible to functional failures when VDD is scaled down. Although several published SRAM designs scale VDD to 200-300 mV, these designs do not sufficiently consider SRAM robustness, limiting them to small arrays because of yield constraints, and may not correctly target the minimum energy operation point. We examine the effects on area and energy for the differential 6T and 8T bit cells as VDD is scaled down, and the bit cells are either sized and doped, or assisted appropriately to maintain the same yield as with full VDD. SRAM robustness is calculated using importance sampling, resulting in a seven-order run-time improvement over Monte Carlo sampling. Scaling 6T and 8T SRAM VDD down to 500 mV and scaling 8T SRAM to 300 mV results in a 50% and 83% dynamic energy reduction, respectively, with no reduction in robustness and low area overhead, but increased leakage per bit. Using this information, we calculate the supply voltage for a minimum total energy operation (VMIN) based on activity factor and find that it is significantly higher for SRAM than for logic.


Proceedings of the IEEE | 2010

Circuit Design Advances for Wireless Sensing Applications

Gregory K. Chen; Scott Hanson; David T. Blaauw; Dennis Sylvester

Miniature wireless sensors with long lifetimes enable new applications for medical diagnosis, infrastructure monitoring, military surveillance, and environmental sensing among many other applications in a growing field. Sensor miniaturization leads to decreased on-sensor energy capacity, and lifetime requirements further constrain the sensors power budget. To enable millimeter-scale wireless sensors with lifetimes of months to years, a new class of low-power circuit techniques is required. Wireless sensors collect and digitize environmental data before processing and transmitting the data wirelessly to base stations or other sensor nodes. Recent low-power advances for each of these functions shed light on how ubiquitous sensing can become a reality.


international solid-state circuits conference | 2012

Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores

David Fick; Ronald G. Dreslinski; Bharan Giridhar; Gyouho Kim; Sangwon Seo; Matthew Fojtik; Sudhir Satpathy; Yoonmyung Lee; Daeyeon Kim; Nurrachman Liu; Michael Wieckowski; Gregory K. Chen; Trevor N. Mudge; Dennis Sylvester; David T. Blaauw

Recent high performance IC design has been dominated by power density constraints. 3D integration increases device density even further, and these devices will not be usable without viable strategies to reduce power consumption. This paper proposes the use of near-threshold computing (NTC) to address this issue in a stacked 3D system. In NTC, cores are operated near the threshold voltage (~200mV above Vth) to optimally balance power and performance [1]. In Centip3De, we operate cores at 650mV, as opposed to the wear-out limited supply voltage of 1.5V. This improves measured energy efficiency by 5.1×. The dramatically lower power consumption of NTC makes it an attractive match for 3D design, which has limited power dissipation capabilities, but also has improved innate power and performance compared to 2D design.


international solid-state circuits conference | 2014

16.2 A 0.19pJ/b PVT-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS

Sanu K. Mathew; Sudhir K. Satpathy; Mark A. Anders; Himanshu Kaul; Steven K. Hsu; Amit Agarwal; Gregory K. Chen; Rachael J. Parker; Ram K. Krishnamurthy; Vivek De

Physically unclonable function (PUF) circuits are low-cost cryptographic primitives used for generation of unique, stable and secure keys or chip IDs for device authentication and data security in high-performance microprocessors [1][2][3][7]. The volatile nature of PUFs provides a high level of security and tamper resistance against invasive probing attacks compared to conventional fuse-based key storage technologies [4]. A process-voltage-temperature (PVT) variation-tolerant all-digital PUF array targeted for on-die generation of 100% stable, device-specific, high-entropy keys is fabricated in 22nm tri-gate high-κ metal-gate CMOS technology [5], featuring: i) a hybrid delay/cross-coupled PUF circuit where interaction of 16 minimum-sized, variation-impacted transistors determines resolution dynamics, ii) a temporal majority voting (TMV) circuit to stabilize occasionally unstable bits, resulting in 53% reduction in instability, iii) burn-in hardening to reinforce manufacturing-time PUF bias, resulting in 22% reduction in bit-errors, iv) soft dark bits for run-time identification and sequestration of highly unstable bits during field operation, resulting in 78% lower bit-errors, v) 19× separation between inter- and intra-PUF Hamming distance, enabling die-specific keys, vi) autocorrelation factor≈0 and entropy=0.9997, while passing NIST randomness tests, vii) high tolerance to voltage and temperature variation with 82% reduction in average Hamming-distance using a 100-cycle dark bit window, viii) in-situ PUF hardening by leveraging directed NBTI aging to improve stability during field operation, and ix) ultra-low energy consumption of 0.19pJ/b with compact bitcell layout of 4.66μm2 (Fig. 16.2.7a).


IEEE Transactions on Circuits and Systems | 2013

Circuits for a Cubic-Millimeter Energy-Autonomous Wireless Intraocular Pressure Monitor

Mohammad Hassan Ghaed; Gregory K. Chen; Razi-ul Haque; Michael Wieckowski; Yejoong Kim; Gyouho Kim; Yoonmyung Lee; Inhee Lee; David Fick; Daeyeon Kim; Mingoo Seok; Kensall D. Wise; David T. Blaauw; Dennis Sylvester

Glaucoma is the leading cause of blindness, affecting 67 million people worldwide. The disease damages the optic nerve due to elevated intraocular pressure (IOP) and can cause complete vision loss if untreated. IOP is commonly assessed using a single tonometric measurement, which provides a limited view since IOP fluctuates with circadian rhythms and physical activity. Continuous measurement can be achieved with an implanted monitor to improve treatment regiments, assess patient compliance to medication schedules, and prevent unnecessary vision loss. The most suitable implantation location is the anterior chamber of the eye, which is surgically accessible and out of the field of vision. The desired IOP monitor (IOPM) volume is limited to 1.5mm3 (0.5x1.5x2mm3) by the size of a self-healing incision, curvature of the cornea, and dilation of the pupil.


international conference on computer aided design | 2007

Yield-driven near-threshold SRAM design

Gregory K. Chen; David T. Blaauw; Trevor N. Mudge; Dennis Sylvester; Nam Sung Kim

Voltage scaling is desirable in SRAM to reduce energy consumption. However, commercial SRAM is prone to functional failures when Vdd is scaled. Several SRAM designs scale Vdd to 200-300 mV to minimize energy per access, but these designs do not consider SRAM robustness, limiting them to small arrays and sensor type applications. We examine the effects on area and energy for a differential 6 T, single-ended 6 T with power rail collapsing and an 8 T bitcell as Vdd is scaled and the bitcells are sized appropriately to maintain robustness. SRAM robustness is examined using importance sampling to reduce simulation runtime. At high voltages, the differential 6T bitcell is the smallest for the same failure rate, but the 8 T bitcell is smaller when Vdd is scaled below 450 mV. For Vdd below Vth, bitcells must be sized greatly to retain robustness and large arrays become impractical. The differential 6 T and 8 T designs have the lowest dynamic energy consumption, and the single-ended 6 T design has the lowest leakage. The supply voltage for minimum energy operation depends on cache configuration and can be well above Vth for large caches with low dynamic activity.


IEEE Journal of Solid-state Circuits | 2013

A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells

Matthew Fojtik; Daeyeon Kim; Gregory K. Chen; Yu-Shiang Lin; David Fick; Junsun Park; Mingoo Seok; Mao-Ter Chen; Zhiyoong Foo; David T. Blaauw; Dennis Sylvester

An 8.75 mm3 microsystem targeting temperature sensing achieves zero-net-energy operation using energy harvesting and ultra-low-power circuit techniques. A 200 nW sensor measures temperature with -1.6 °C/+3 °C accuracy at a rate of 10 samples/sec. A 28 pJ/cycle, 0.4 V, 72 kHz ARM Cortex-M3 microcontroller processes temperature data using a 3.3 fW leakage per bit SRAM. Two 1 mm2 solar cells and a thin-film Li battery power the microsystem through an integrated power management unit. The complete microsystem consumes 7.7 μ W when active and enters a 550 pW data-retentive standby mode between temperature measurements. The microsystem can process temperature data hourly for 5 years using only the initial energy stored in the battery. This lifetime is extended indefinitely using energy harvesting to recharge the battery, enabling energy-autonomous operation.

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Dennis Sylvester

Georgia Institute of Technology

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Daeyeon Kim

University of Michigan

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David Fick

University of Michigan

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