Guenter Hofer

Highly efficient multistandard RFIDs enabling passive wireless sensing

This paper presents a highly efficient analog multistandard frontend for passive sensor-enabled RFID transponders. The CMOS only frontend is implemented in a 0.13 µm CMOS technology. The measured overall RF-to-DC power conversion efficiency of the analog frontend for a DC output power of 10 µW is about 7% and the maximum efficiency is about 15% at UHF. An implemented sensor interface consumes 1.4 µA at 1V supply. This interface contains an ultra low-power successive approximation ADC that uses the capacitive charge redistribution technique for its integrated DAC.

Energy-Efficient Wireless Sensing Using a Generic ADC Sensor Interface Within a Passive Multi-Standard RFID Transponder

A successive approximation analog-to-digital converter (ADC) is presented, whose components make use of effective ultralow-power techniques to enable wireless sensing with passive and semi-passive sensor nodes. Compared with prior publications, new layout enhancements were applied to the capacitive array of the integrated digital-to-analog converter (DAC) to achieve less distortion caused by mismatch. In addition, it is shown that the digital circuit parts consume most of the available energy. Therefore, digital near-threshold operation is proposed to minimize their consumption. The applicability of the ADC is demonstrated in a UHF RFID system. Within this system, it is applied as a core of a sensor interface integrated into a passive multistandard RFID transponder. The EPC protocol used for communication ensures the compatibility with standard UHF RFID readers while the sensor data is acquired using custom commands. Single sensor readings are demonstrated as well as continuous sensor data transmission without further interaction of the reader device. A stable transponder reading distance of 6.5 m is achieved. The integrated ADC consumes only 525 nA at 40 kSps and 0.9-V supply voltage. Under these conditions, an ENOB of 7.23 is achieved and thus a FOM of 79 fJ/conversion-step.

Wireless sensing by means of passive multistandard RFID tags

This paper presents a generic sensor interface built in a 0.13 µm CMOS process capable of being applied in passive HF & UHF RFID Tags without any additional power supply. The sensor interface contains an ultra low-power successive approximation ADC that uses the capacitive charge redistribution technique for its integrated DAC. An on-chip temperature sensor and up to three additional sensor signals can be applied to the ADC. A conversion rate of 100 kSps is reached while consuming less than 1.5 µA at 0.9 Volt supply voltage.

Low voltage reference cells for UHF transponders with advanced features

In this paper a low voltage RC oscillator for standard RFID applications and local positioning is presented. Its bias current is provided by a current-mode bandgap whose reference voltage can also be used for enhanced transponder applications like sensing. The chip is designed in a 0.13 µm CMOS technology with p substrate. It was developed at the Institute for Electronics Engineering within the scope of a research project supported by the Bavarian Research Foundation.

Multifunctional Reference Cells for Multistandard RFID Transponders

This paper at first illustrates implementation aspects and measurement results of a subcomponent for a multistandard RF identification (RFID) transponder. It is intended to be a common reference cell, both for basic UHF requirements and advanced application fields like local positioning and wireless sensing. Different single circuit topologies shown in previous studies or literature and their applicability for that RFID system are evaluated. After that, measurement results of two final circuit configurations, including a newly designed RC oscillator with metal-metal capacitors, are discussed and compared. Layout aspects for reducing the process variations and low power consumption are demonstrated. Simulation results show border conditions for the power supply of the transponder on chip level. Moreover, distance measurements with our first complete transponder compliant to the electronic product code protocol are shown. It includes the newly presented reference cells and other necessary transponder components. All chips are designed based on a 0.13-μm CMOS technology.

Design of a low-power voltage regulator for RFID applications

This paper briefly reviews common state-of-the-art architectures of voltage regulators and their applicability to RFID. After that the design of a Low Drop-out (LDO) regulator using active resistances is presented, especially suitable for RFID applications. The chip is designed based on a 0.13 µm CMOS technology.

Design of a low-voltage reference circuit with reconfigurable temperature range for rfid applications

This paper describes the design of a current mode bandgap for RFID applications. Its temperature compensation network can be set between two states which enables different compensation criteria. In the first state the temperature dependent behavior is optimized around ambient temperature, in the other state a better adaption at the higher temperature range can be achieved. The chip is designed in a 0.13 µm CMOS technology. It was developed at the Institute for Electronics Engineering within the scope of a research project supported by the Bavarian Research Foundation.

Sensor data acquisition with a 79-fJ/conversion-step 7.2-ENOB successive approximation ADC for low-power wireless applications

A successive approximation (SAR) ADC is presented, whose components make use of effective ultra low-power techniques to enable wireless sensing with passive and semi-passive sensor nodes. Compared to prior publications new layout enhancements were applied to the integrated capacitive DAC array to gain less distortion caused by mismatch. In addition it is shown, that the digital circuit parts consume most of the available energy. Therefore digital near-threshold operation is proposed to minimize their consumption. The applicability of the ADC is demonstrated in an UHF RFID System. Within this system it is applied as core of a sensor interface integrated into a passive multi-standard RFID tag. The EPC protocol used for communication ensures the compatibility with standard UHF RFID readers while the sensor data is acquired using custom commands. The ADC consumes only 525 nA at 40 kSps and 0.9V supply voltage. Under these conditions an ENOB of 7.23 is reached and thus a FOM of 79 fJ/conversion-step.

A single chip FSK/ASK 900 MHz transceiver in a standard 0.25 um CMOS technology

This paper presents a low power consumption single chip FSK/ASK transceiver for half-duplex low datarate communication in the 868-870 MHz band. The IC was processed in a standard 0.25 um CMOS technology, offers a very high level of integration and needs only few external components. The transmit/receive RF front end contains a high efficiency power amplifier, a low noise amplifier (LNA), a double balanced RF mixer and an I/Q mixer for down conversion to an intermediate frequency (IF) of 289 MHz and further to zero IF. The transmit/receive frequency synthesis of 868/1157 MHz is done by a fully integrated switchable frequency range voltage controlled oscillator (VCO), a phase locked loop synthesizer (PLL) and a tunable crystal oscillator used as reference frequency generator as well as FSK modulator. A bandwidth configurable I/Q channel select filter, an I/Q limiter with RSSI generation used also for AM demodulation, a FSK demodulator, a bandwidth configurable data filter and a dataslicer are implemented for further zero IF and baseband analog signal processing. The transceiver can be configured by a 2/3-wire bus interface. Low-drop voltage regulators are implemented to allow supply voltages up to 3.6 V because the maximum allowed voltages for the standard MOS transistors are 2.8 V. The overall current consumption of the transceiver in the receive and transmit mode is 11 mA and 20 mA, respectively. Additionally, a standby mode and idle mode is realized to increase battery lifetime.

Wireless integrated sensor nodes for indoor monitoring and localization

This paper presents an overview of wireless integrated sensor node realizations for indoor monitoring and localization applications. Depending on the targeted application scenario different wireless sensor node implementations based on either high-performance processors or semi-passive radio-frequency identification (RFID) cores are outlined. The presented high-performance node realization with monitoring and seamless indoor and outdoor localization capability can operate independently for a duration of one day and additionally features wireless charging. Furthermore, a UHF RFID Gen2 sensor tag for indoor localization and fall detection is presented that enables a battery lifetime of approximately one month. Finally, ultra-low-power UHF RFID sensor node concepts based on sub-threshold wake-up receivers are introduced that can achieve operational times of several years for specific low duty cycle scenarios.