Gurudatta M. Parulkar

Bringing real-time scheduling theory and practice closer for multimedia computing

This paper seeks to bridge the gap between theory and practice of real-time scheduling in the domain of high speed multimedia networking. We show that the strict preemptive nature of real-time scheduling leads to more context switching, and requires system calls for concurrency control. We present our scheduling scheme called rate-monotonic with delayed preemption (rmdp) and show how it reduces both these overheads. We then develop the analytical framework to analyze rmdp and other scheduling schemes that lie in the region between strict (immediate) preemption and no preemption. Our idealized scheduler simulation methodology accounts for the blocking introduced by these schemes under the usual assumption that the time for context switching and preemption is zero. We derive simpler schedulability tests for non-preemptive scheduling, and prove a variant of rate-monotonic scheduling that has fewer preemptions. Our measurements on Sparc and Pentium platforms, show that for the workloads we considered, Rmdp increases useful utilization by as much as 8%. Thus our scheduling policies have the potential to improve performance over existing methods.

Experimental evaluation of SUNOS IPC and TCP/IP protocol implementation

Results of a study that characterizes the performance of SunOS Inter-Process Communication (IPC) and TCP/IP protocol implementation for distributed high-bandwidth applications are presented. Components studied include queuing in different layers, protocol control mechanisms (such as flow and error control), per-packet processing, buffer requirements, and interaction with the operating system. The Unix kernel and two public-domain tools for IPC measurement are reviewed. >

Axon: a high speed communication architecture for distributed applications

The primary goal of the Axon architecture is to support a high-performance data path delivering VHSI (very high speed internetwork) bandwidth directly to applications. The significant features of Axon are: (1) an integrated design of host and network interface architecture, operating systems, and communication protocols; (2) a network virtual storage facility which includes support for virtual shared memory on loosely coupled systems; (3) a high-performance, lightweight object transport facility which can be used by both message-passing and shared-memory mechanisms; and (4) a pipelined network interface which can provide a path directly between the VHSI and host memory.<<ETX>>

Efficient data layout, scheduling and playout control in MARS

Abstract. Large-scale on-demand multimedia servers that can provide independent and interactive access to a vast amount of multimedia information to a large number of concurrent clients will be required for a widespread deployment of exciting multimedia applications. Our project, called Massively-parallel And Real-time Storage (MARS) is aimed at prototype development of such a large-scale server. This paper primarily focuses on the distributed data layout and scheduling techniques developed as a part of this project. These techniques support a high degree of parallelism and concurrency, and efficiently implement various playout control operations, such as fast forward, rewind, pause, resume, frame advance and random access.

The next generation of internetworking

This paper describes a research effort concerned with the design of the next generation of internet architecture, which has been necessitated by two emerging trends. First, there will be at least a few orders of magnitude increase in data rates of communication networks in the next few years. For example, researchers are already prototyping networks with data rates of up to a few hundred Mbps, and are planning networks with data rates up to a few Gbps. Second, researchers from all disciplines of science, engineering, and humanities plan to use the communication infrastructure to access widely distributed resources in order to solve bigger and more complex problems. These trends provide new challenges and opportunities to researchers in the communication field. One such challenge is the design of what we call the very high speed internet (VHSI) abstraction which can help efficiently support guaranteed levels of performance for a variety of applications, and can cope with the ever increasing diversity of underlying networks with rapidly growing user population and needs. Our strategy towards achieving this ambitious goal comprises the following:&bull; Design, specification, and prototype implementation of a novel multipoint congram-oriented service that can work well with connection-oriented and datagram high speed networks, can provide variable grade service on a need basis to its applications, and can provide adequate reconfigurability to deal with survivability requirements due to network failures.&bull; Design and implementation of gateway architectures that can support data rates of a few hundred Mbps, can interface with diverse networks, and can implement the congram-oriented service without becoming a performance bottleneck.&bull; Development of analytical and simulation models to evaluate important tradeoffs associated with the design of a congram-oriented protocol, the resource management on diverse networks, and the design of new gateway architectures.

An application-oriented error control scheme for high-speed networks

Many new network applications demand interprocess communication (IPC) services that are not supported by existing transport protocol mechanisms. Large bandwidth-delay products of high-speed networks also render some of the existing error and flow control mechanisms less efficient. In particular, new error control schemes that can provide variable degrees of error recovery according to the applications requirements are desirable. This paper presents the design, evaluation, and implementation of an application-oriented error control-scheme that is aimed at supporting efficient IPC in high-speed networking environments. Our results indicate that the proposed error control scheme allows effective control of the trade-off between the amount of error an application can tolerate and the amount of delay it has to suffer.

Design of Universal Continuous Media I/O

The problem this research addresses is how to modify an existing operating systems i/o subsystem to support new high-speed networks and high-bandwidth multimedia applications that will play an important role in future computing environments.

Axon: Application-Oriented Lightweight Transport Protocol Design

This paper describes the application-oriented lightweight transport protocol for object transfer (ALTP-OT) in the Axon host communication architecture for distributed applications. The Axon Project is investigating an integrated design of host architecture, operating systems, and communication protocols to allow the utilization of the high band-width provided by the next generation of communication networks. ALTP-OT provides the end-to-end transport of segment and message objects for interprocess communication across a very high speed internetwork, supporting demanding applications such as scientific visualization and imaging. ALTP-OT uses rate-based flow control specifically oriented to the transfer of objects directly between application memory spaces. This... Read complete abstract on page 2.

Specification of a multipoint congram-oriented high performance internet protocol

G.M. Parulkar (Comput. Commun. Rev., vol.20, no.1, p.18-43, Jan. 1990) previously proposed a very high-speed internet (VHSI) abstraction that provides a variable grade of service with performance guarantees on top of diverse networks. An improvement component of the VHSI abstraction is a novel multipoint congram-oriented high-performance internet protocol (MCHIP). Features of this protocol include the following: support for multipoint communication; the congram as the service primitive, incorporating strengths of both connection and datagram approaches; the ability to provide a variable grade of service with performance guarantees; and suitability for high-speed implementation. The authors introduce the VHSI abstraction, focusing on the description of MCHIP.<<ETX>>

Towards a framework for high speed communication in a heterogeneous networking environment

A framework is formulated for high-speed communication in an environment comprising a mix of subnetworks with widely varying characteristics. It combines elements of recent work on high-speed packet switching and on interworking of computer networks. The work on high-speed packet switching is expected to lead to the development of large public networks capable of supporting applications ranging from low-speed data to voice, high-speed data and video. Interworking of existing computer networks with high-speed connection-oriented networks will allow them to be used effectively by applications that require the high performance levels such networks can provide.<<ETX>>The issues that are specific to heterogeneous networks are addressed. Some background on both the current ARPA internet model and high-speed packet switching is provided. This discussion includes: the internet components; the internet protocol hierarchy, popularly known as the transmission control protocol/internet protocol (TCP/IP) protocol suite; and the internet strengths and weaknesses. The major elements of an extended internet model that allows internetworking of new high-speed packet networks with a wide range of other networks, including current data networks and national telephone networks, are outlined. Some end-to-end and host interface issues are examined.<<ETX>>