Gwanghyeon Baek

Electrical Properties and Stability of Dual-Gate Coplanar Homojunction DC Sputtered Amorphous Indium–Gallium–Zinc–Oxide Thin-Film Transistors and Its Application to AM-OLEDs

The electrical characteristics and stability of dual-gate (DG) coplanar homojunction amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) on glass substrates are described herein. In this device structure, both top gate (TG) and bottom gate are defined by lithography, allowing independent biasing when adjacent TFTs are present. The DG a-IGZO TFT demonstrates excellent electrical performance with subthreshold swing (SS) of 99 mV/dec, field-effect mobility of 15.1 , and on- off current ratio of . By applying various bias voltages on the TG electrode, it is found that the TFT threshold voltage can be controlled without any change of the SS and off current. Under conditions of negative bias temperature stress (BTS), the transfer curves of the TFT exhibit negligible shifts after 10 000 s. Larger shifts are observed under conditions of a positive BTS. Finally, the application of this DG device to active-matrix organic light-emitting displays is suggested.

Low frequency noise in long channel amorphous In–Ga–Zn–O thin film transistors

We investigated the low-frequency noise properties in the inverted-staggered amorphous In–Ga–Zn–O (a-IGZO) thin-film transistors (TFTs) with the silicon dioxide (SiO2) gate dielectric. The dependence of noise level on gate area indicates that the 1/f noise is the dominate source and the contribution from TFT parasitic resistances can be ignored in long channel devices. The gate voltage dependent noise data closely follow the mobility fluctuation (Δμ) model, and the Hooge’s parameter (αH) was extracted to be ∼1.52×10−3, which is much lower than the reported αH for a-Si:H TFTs. Finally, in the comparative study, the noise level in an unannealed a-IGZO TFT was found to be higher than that in an annealed device. The present results suggest that the 1/f noise in our a-IGZO TFT samples is sensitive to the active layer quality (i.e., concentration of conduction band-tail and/or deep gap states). In addition, the observed low noise in a-IGZO TFT can be associated with the s-orbital conduction in amorphous oxide s...

Electrical Instability of Double-Gate a-IGZO TFTs With Metal Source/Drain Recessed Electrodes

The electrical stability of double-gate (DG) and single-gate (SG) amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) with metal source/drain recessed electrodes on glass is investigated and compared. In the device structure of the a-IGZO TFTs, both top gate and bottom gate are defined by lithography, allowing independent or synchronized biasing. Bias temperature stress (BTS) are performed on SG a-IGZO TFTs and DG a-IGZO TFTs with synchronized gate bias condition. Under both positive and negative BTS, synchronized DG a-IGZO TFTs demonstrate much smaller ΔVTH shift than SG a-IGZO TFTs.

Modeling of current—voltage characteristics for double‐gate a‐IGZO TFTs and its application to AMLCDs

— The equations for the transfer characteristics, subthreshold swing, and saturation voltage of double-gate (DG) a-IGZO TFTs, when the top- and bottom-gate electrodes are connected together (synchronized), were developed. From these equations, it is found thatsynchronized DG a-IGZO TFTs can be considered as conventional TFTs with a modified gate capacitance and threshold voltage. The developed models were compared with the top or bottom gate only bias conditions. The validity of the models is discussed by using the extracted TFT parameters for DG coplanar homojunction TFTs. Lastly, the new pixel circuit and layout based on a synchronized DG a-IGZO TFT is introduced.

P-11: Electrical Properties and Stability of Dual-Gate Coplanar Homojunction Amorphous Indium-Gallium-Zinc-Oxide Thin-Film Transistor

The electrical characteristics and stabilities of dual-gate (DG) coplanar homojunction amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) are described. When the gate voltage is applied on top and bottom electrodes, the DG a-IGZO TFT showed an excellent electrical performance with the sub-threshold swing of 99 mV/dec, the mobility of 15.1 cm2/V·s and the on-off ratio of 109. Under positive bias temperature stress, the device threshold voltage shifts about +4.5V after 10,000 seconds, while its shifts under negative bias temperature stress are very small. The effect of TFT illumination is also discussed.

Scaling of coplanar homojunction amorphous In-Ga-Zn-O thin-film transistors

Channel length (L) and width (W) scaling of amorphous In–Ga–Zn–O (a-IGZO) thin-film transistors (TFTs) have been investigated by coplanar homojunction a-IGZO TFTs. The fabricated TFTs have a mobility around 12 cm2 V-1 s-1, sub-threshold slope (S) of ~110 mV/decade, threshold voltage around 0.3 V and off-current below 10-13 A. The TFTs with L > 5 µm have the reduced transconducance (gm) at lower VGS, however, the short L < 5 µm TFTs have the gm reduction at higher VGS. Even though the TFTs with smaller channel length (L ≤5 µm) show proper switching characteristics, threshold voltage lowering and sub-threshold slope degradation are clearly observed.

Electrical Instability of the a-Si:H TFTs Fabricated by Maskless Laser-Write Lithography on a Spherical Surface

We fabricated and characterized hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with a channel length of 10 on both spherical and flat surfaces using maskless laser-write lithography (LWL). In addition to the electrical performance, the threshold voltage shift of the a-Si:H TFT under bias-temperature stress is investigated and discussed in comparison to a device fabricated on a flat surface. The obtained results show that the a-Si:H TFTs fabricated by LWL method on a curved surface are suitable for pixel switches and circuits, which are needed to realize image sensor arrays and/or displays on a nonplanar surface.