Gyu H. Cho

A general circuit topology of multilevel inverter

A generalized circuit topology of multilevel voltage source inverters which is based on a direct extension of the three-level inverter to higher level is proposed. The circuit topologies up to five-level are presented. The proposed multilevel inverter can realize any multilevel pulsewidth modulation (PWM) scheme which leads to harmonic reduction and provides full utilization of semiconductor devices like GTOs, especially in the high power range where high voltage can be applied. The capacitor voltage balancing problem is discussed and a circuit remedy for such a problem is given.<<ETX>>

DSP based space vector PWM for three-level inverter with DC-link voltage balancing

The authors describe a novel PWM (pulse width modulation) method for a three-level inverter considering the DC link capacitor balancing problem. Each voltage vector on the space vector plane is classified in relation to the charging/discharging action of DC capacitors, and a novel modulation method is suggested based on the voltage vector selection principle. The algorithm was implemented on the Motorola DSP 56000 and tested with the 7.5 kVA prototype three-level transistor inverter. The effectiveness of the proposed PWM method was verified by the experimental results. It was shown that the proposed PWM techniques are suitable for a high-power GTO (gate turn-off thyristor) three-level inverter satisfying capacitor voltage balancing.<<ETX>>

Analysis and controller design of static VAr compensator using three-level GTO inverter

A static VAr compensator (SVC) using a three-level GTO voltage source inverter (VSI) is presented for high-voltage, high-power applications. The three-level VSI has lower harmonic components and higher DC-link voltage than the two-level VSI and thus can be operated at lower switching frequency (f/sub sw/<500 Hz) without excessive harmonic contents. From the DQ-transformed equivalent circuit of the presented SVC system, DC and AC analyses are carried out to find the steady-state and the dynamic characteristics of the system. Based on the open-loop transfer function of the system, a controller is designed to achieve fast dynamic response. The experimental results confirm the theoretical analyses and controller design.

Novel soft switching PWM converter using a new parallel resonant DC-link

A novel soft switching pulsewidth modulated (PWM) converter for high-frequency AC/DC and/or DC/AC power conversion is presented by using a parallel resonant DC-link (PRDCL) and by adopting single-phase soft switching (SPSS) technique. The PRDCL provides variable link pulse position as well as variable link pulse width, which is a quite different feature from the other resonant DC-links, and thus the PWM capability can be increased. The SPSS technique is adopted for further enhancement of PWM capability. Moderate combination of two soft switching operations enables the conventional space vector PWM technique to be used. Due to distinctive advantages, including true PWM capability, minimum device voltage stresses, and reasonable additional device count, the proposed converter can be operated in a wide power range (20-200 kW). Operational principles, analyses, and the realization of a space vector PWM of the proposed converter are presented. Simulation results are shown to verify the operational principle.<<ETX>>

Soft-switched matrix converter for high frequency direct AC-to-AC power conversion

Abstract A soft-switched matrix converter is proposed using the zero voltage switching technique in some resonant pole inverters. A high operating frequency with safe and efficient switching improves the dynamic and spectral performances and simplifies the protection logics and snubber networks. Further, it can be implemented using simple analogue circuits, having similar transfer characteristics to those of the modern pulse width modulated matrix converters, such as maximum voltage transfer ratio and unity input displacement factor. Analyses, design and simulation results are presented to verify the operating principle.

Soft switching space vector PWM inverter using a new quasi-parallel resonant DC link

A soft switching quasi-parallel resonant DC-link (QPRDCL) inverter with improved PWM capability has been recently presented. The circuit has the minimum voltage stress of the devices and provides the flexibility of selecting the on/off instants of the resonant link, resulting in improved PWM capability. In this paper, the operational principles and the detailed analysis of the QPRDCL inverter are presented for the resonant components design and the inverter control. An SVPWM with optimal vector sequence suitable for the QPRDCL inverter is also presented through the comparisons among five different modified space vector PWM (SVPWM) techniques classified by the voltage vector sequences. The performance of the selected optimal SVPWM is verified by the experimental results.

Optimal PWM design for high power three-level inverter through comparative studies

Comparative studies between harmonic elimination and optimal PWM strategies are given for high power three-level inverter feeding an induction motor. An effective PWM map construction method based on the valid region on the frequency modulation index plane is suggested. Thereby, an optimal map including asynchronous space vector PWM, harmonic elimination and optimal PWM method is generated covering all of the low, middle and high modulation index regions. The PWM map was designed for 1 MVA rated general purpose GTO inverter and implemented with a digital signal processor. Experimental results are presented for 10 kVA prototype. >

New power active filter with simple low cost structure without tuned filters

This paper presents a new active power filter connected in series with a bank of capacitors having no tuned filters and no resonance problem related with harmonic loads. A capacitor of appropriate small size is determined considering much small power capacity of the converter compared with load power. Through frequency analysis of the system, a dual loop controller is designed for eliminating harmonics of load current and reducing the fundamental voltage component of the converter. Finally, the performance of the presented scheme is confirmed using simulation with 10 kVA 6-pulse load and experimental results with 1 kVA 6-pulse load.

Optimum quantum sequence control of quantum series resonant converter for minimum output voltage ripple

A new control scheme named optimum quantum sequence control (OQSC) which always minimizes the output voltage ripple of the quantum series resonant converter (QSRC) for all possible sequences is proposed. This control scheme is so general that it is irrelevant to all circuit conditions such as magnitudes of circuit elements as well as input/output voltage so far as it is operating in the continuous conduction mode (CCM). Furthermore, the dynamic range of QSRC is much extended by the OQSC. This feature is verified by simulations and experiments with good agreements. >

Modeling of quantum parallel resonant converters-a new parallel resonant converters controlled by integral cycle mode

Quantum parallel resonant converters (QPRCs), a dual converter of quantum series resonant converters (QSRCs), and a subset of parallel resonant converters (PRCs) operating on zero-voltage switching conditions are modeled. It is shown that the QPRC can be operated as a Cuk converter with an equivalent capacitor, or as a buck or buck-boost converter with an additional equivalent capacitor. The approach to modeling these converters is verified by analysis and simulation results for the PRC. DC and AC characteristics of the quantum PRCs can be obtained from these models. Therefore, the QPRC can be designed to be similar to the QSRC, i.e. to be controlled with closed-loop feedback and to have advantages such as low device switching stress, reliable high-frequency operation, low electromagnetic interference, etc.<<ETX>>