H. C. Chiu

Structural and electrical characteristics of atomic layer deposited high κ HfO2 on GaN

High κ HfO2 was deposited on n-type GaN (0001) using atomic layer deposition with Hf(NCH3C2H5)4 and H2O as the precursors. Excellent electrical properties of TiN∕HfO2∕GaN metal-oxide-semiconductor diode with the oxide thickness of 8.8nm were obtained, in terms of low electrical leakage current density (∼10−6A∕cm2 at VFB+1V), well behaved capacitance-voltage (C-V) curves having a low interfacial density of states of 2×1011cm−2eV−1 at the midgap, and a high dielectric constant of 16.5. C-V curves with clear accumulation and depletion behaviors were shown, along with negligible frequency dispersion and hysteresis with sweeping biasing voltages. The structural properties studied by high-resolution transmission electron microscopy and x-ray reflectivity show an atomically smooth oxide/GaN interface, with an interfacial layer of GaON ∼1.8nm thick, as probed using x-ray photoelectron spectroscopy.

Achieving a low interfacial density of states in atomic layer deposited Al2O3 on In0.53Ga0.47As

Atomic-layer-deposited Al2O3 on In0.53Ga0.47As with short air exposure between the oxide and semiconductor deposition has enabled the demonstration of nearly ideal frequency-dependent and quasistatic capacitance-voltage (C-V) characteristics. The excellent quasistatic C-V characteristics indicate a high efficiency of 63% for the Fermi-level movement near the midgap. A low mean interfacial density of states (D¯it)∼2.5×1011u2002cm−2u2009eV−1 was determined under 1 MHz using a charge pumping method, which was also employed to probe the depth profile of bulk traps (Nbt) and the energy dependence of Dit at 50 kHz: a low Nbt∼7×1018u2002cm−3 and a Dit of (2–4)×1011u2002cm−2u2009eV−1 in the lower half of the band gap and a higher Dit of ∼1012u2002cm−2u2009eV−1 in the upper half of the band gap. The employment of charge pumping method has given a more accurate determination of Dit, which is usually overestimated using other commonly methods such as the Terman, conductance, and high-low frequencies due to the influence of weak inversion at ro...

Attainment of low interfacial trap density absent of a large midgap peak in In0.2Ga0.8As by Ga2O3(Gd2O3) passivation

The pronounced high interfacial densities of states (Dit) commonly observed around the midgap energy of dielectric/GaAs interfaces are generally considered the culprit responsible for the poor electrical performance of the corresponding inversion-channel metal-oxide-semiconductor field-effect-transistors. In this work, comprehensive Dit spectra as the function of energy [Dit(E)] inside the In0.2Ga0.8As band gap were constructed by using the quasistatic capacitance-voltage and the temperature-dependent conductance method on n- and p-type ultrahigh vacuum (UHV)-Ga2O3(Gd2O3)/In0.2Ga0.8As and atomic-layer-deposited (ALD)-Al2O3/In0.2Ga0.8As metal-oxide-semiconductor capacitors. Unlike the ALD-Al2O3/In0.2Ga0.8As interface giving a Dit spectrum with a high midgap Dit peak, the UHV-Ga2O3(Gd2O3)/In0.2Ga0.8As interface shows a Dit spectrum that monotonically decreases from the valence band to the conduction band with no discernible midgap peak.The pronounced high interfacial densities of states (Dit) commonly observed around the midgap energy of dielectric/GaAs interfaces are generally considered the culprit responsible for the poor electrical performance of the corresponding inversion-channel metal-oxide-semiconductor field-effect-transistors. In this work, comprehensive Dit spectra as the function of energy [Dit(E)] inside the In0.2Ga0.8As band gap were constructed by using the quasistatic capacitance-voltage and the temperature-dependent conductance method on n- and p-type ultrahigh vacuum (UHV)-Ga2O3(Gd2O3)/In0.2Ga0.8As and atomic-layer-deposited (ALD)-Al2O3/In0.2Ga0.8As metal-oxide-semiconductor capacitors. Unlike the ALD-Al2O3/In0.2Ga0.8As interface giving a Dit spectrum with a high midgap Dit peak, the UHV-Ga2O3(Gd2O3)/In0.2Ga0.8As interface shows a Dit spectrum that monotonically decreases from the valence band to the conduction band with no discernible midgap peak.

45nm Gateless Anti-Fuse Cell with CMOS Fully Compatible Process

A new gateless anti-fuse cell with 45 nm CMOS fully compatible process has been developed for advanced programmable logic applications. This gateless anti-fuse cell processed by pure logic process and decoupled with logic gate oxide has a highly stable and five orders of on/off current window. It also exhibits superior program performance by only 5 V operation with no more than 10 muA programming current. This new nitride gateless anti-fuse cell is a very promising logic OTP solution with fully CMOS compatible process below 90 nm node.

Engineering of threshold voltages in molecular beam epitaxy-grown Al2O3∕Ga2O3(Gd2O3)∕In0.2Ga0.8As

The metal-oxide-semiconductor (MOS) capacitors of Al2O3∕Ga2O3(Gd2O3) on n- and p-type In0.2Ga0.8As with different metal gates exhibited excellent capacitance-voltage (C-V) characteristics and remarkable thermodynamic stability after rapid thermal annealing up to 850°C. The flat-band voltage (Vfb), flat-band voltage shift (ΔVfb), threshold voltage (Vth), and frequency dispersion of the MOS capacitors with different metal gates were extracted from the C-V curves. The Vth values of Al2O3∕Ga2O3(Gd2O3)∕p-In0.2Ga0.8As were calculated to be about 0.04V (Al gate) and 1.15V (Ni gate) and those of Al2O3∕Ga2O3(Gd2O3)∕n-In0.2Ga0.8As −1.94V (Al gate) and −0.88V (Ni gate). The correlation between flat-band voltage and different metal gates indicates unpinned Fermi levels at the metal/dielectric interfaces.

Inversion-channel GaN MOSFET using atomic-layer-deposited Al 2 O 3 as gate dielectric

For the first time, inversion-channel GaN MOSFETs using atomic-layer-deposited (ALD) Al<inf>2</inf>O<inf>3</inf> as a gate dielectric have been successfully fabricated, showing well-behaved drain I–V and transfer characteristics. The drain current was scaled with gate length, showing a maximum drain current of 10 mA/mm in a device of 1 µm gate length, at a gate voltage (V<inf>gs</inf>) of 8 V and a drain voltage (V<inf>ds</inf>) of 10V. High I<inf>on</inf>/I<inf>off</inf> ratio of 2.5×10⁵ was achieved with a very low off-state leakage of 4×10⁻¹³A/µm. In addition, depletion-mode (D-mode) GaN MOSFETs have also been demonstrated, showing a very low on-resistance of 2.5 mΩ⋅cm², a high mobility of 350 cm²/Vs, and a high maximum drain current of 300 mA/mm in a device of 4 µm gate length.

dc and rf characteristics of self-aligned inversion-channel In0.53Ga0.47As metal-oxide-semiconductor field-effect transistors using molecular beam epitaxy-Al2O3/Ga2O3(Gd2O3) as gate dielectrics

dc and rf characteristics of self-aligned inversion-channel In0.53Ga0.47As metal-oxide-semiconductor field-effect transistors (MOSFETs) using molecular beam epitaxy (MBE) deposited Al2O3/Ga2O3(Gd2O3) (GGO) high κ dielectrics and TiN metal gates are reported. MOSFETs with various oxide thicknesses were fabricated. The In0.53Ga0.47As MOSFETs using Al2O3(2u2002nm)/GGO (5 nm) gate dielectric demonstrated a maximum drain current of 1.05u2002mA/μm and a peak transconductance of 714u2002μS/μm, both are the highest values ever reported for enhancement-mode InGaAs MOSFETs with 1u2002μm gate length. In addition, the same transistors exhibited excellent embedded rf properties and achieved a fT of 17.9 GHz and a fmax of 12.1 GHz. The high-quality in situ MBE growth of high κ dielectrics/InGaAs has attributed to the high device performance.

Nano-electronics of high κ dielectrics on InGaAs for key technologies beyond Si CMOS

The surface Fermi level unpinning in InGaAs has been realized with high κ dielectric growth using molecular beam eitaxy (MBE) and atomic layer deposition (ALD). Furthermore, world-record device performances in self-aligned inversion-channel InGaAs MOSFET and a capacitance equivalent thickness (CET) of ≤ 1 nm in Ga<inf>2</inf>O<inf>3</inf>(Gd<inf>2</inf>O<inf>3</inf>) and ALD-HfO<inf>2</inf> on InGaAs have been achieved.

Nano-electronics of high k dielectrics on exotic semiconductors for science and technology beyond Si CMOS

We have achieved high device performance in self-aligned inversion-channel InGaAs MOSFETs, as well as a CET of < 1 nm, a D<inf>it</inf> ≤ 10¹¹ eV⁻¹cm⁻², and high-temperature thermal stability withstanding >850°C RTA in GGO and a CET of < 1 nm in ALD-HfO<inf>2</inf> on InGaAs. Remarkable device performances in self-aligned, inversion-channel Ge MOSFET using GGO without any interfacial passivation layers (IPLs), and inversion-channel and accumulation type GaN MOSFETs with high ks as gate dielectrics have also been attained. Interfacial characteristics including energy band parameters were studied using x-ray photoelectron spectroscopy (XPS).

InGaAs and Ge MOSFETs with a common high κ gate dielectric

Ultra-high-vacuum (UHV) deposited Ga<inf>2</inf>O<inf>3</inf>(Gd<inf>2</inf>O<inf>3</inf>) [GGO] has been employed for passivating InGaAs and Ge, without using any interfacial paissivation layers (IPLs). The GGO/InGaAs and /Ge metal-oxide-semiconductor capacitors (MOSCAPs) have exhibited low capacitance-equivalent-thickness (CET) of less than 1nm in GGO, low interfacial densities of states (D<inf>it</inf>s) ∼ 10¹¹eV⁻¹cm⁻², and thermal stability at high temperatures. The high-quality GGO and interfaces of GGO/InGaAs, and /Ge enable the fabrications of inversion-channel InGaAs and Ge MOS field-effect-transistors (MOSFETs) using a self-aligned process, leading to high drain currents, transconductances (G<inf>m</inf>), and carrier mobilities.