H. Evans

Negative capacitance at metal-semiconductor interfaces

A negative capacitance effect has been observed in metal‐semiconductor contacts. This phenomenon is explained by considering the loss of interface charge at occupied states below Fermi level due to impact ionization. A modified Shockley–Read treatment is proposed to interpret the experimental observations. In particular, a two‐energy‐level simplified model is presented to simulate the capacitance spectrum. The results are in good agreement with the experimental data.

Effect of Schottky barrier height on EL2 measurement by deep-level transient spectroscopy

A systematic study of EL2 midgap trap in GaAs using deep‐level transient spectroscopy (DLTS) is reported for contacts having a large range of Schottky barrier height. The results show that the DLTS signal of EL2 increases as the barrier height rises from 0.62 eV and saturates for barrier height above 0.83 eV. It is found, for the first time, that for Schottky barrier height lower than 0.62 eV the EL2 signal disappears. A model for calculation of the quasi‐Fermi level in the depletion region is used to explain the variation and disappearance of the EL2 signal. This model may also apply to other electron traps near midgap.

Accurate phase capacitance spectroscopy of transition metal silicon diodes

A complete understanding of Schottky barrier devices requires a knowledge of the electronic states at the metal‐semiconductor interface. For this reason, a novel and accurate technique for measuring the capacitance of forward biased Schottky diodes has been developed. It is found that the measurement is extremely sensitive to the phase error and that the lock‐in amplifier behaves in a nonlinear fashion at high signal current. These difficulties have been resolved to realize the interface state spectrum of a Pd/silicon Schottky barrier.

Schottky barrier, electronic states and microstructure at Ni silicide-silicon interfaces☆

Abstract Barrier height and interface states have been measured and correlated to the microstructure of the Ni silicide-Si interfaces, including the type A and type B NiSi 2 and a type C NiSi. All these interfaces can be formed with near perfect structures to yield a barrier height of 0.78 eV. Less perfect interfaces formed under less than ideal conditions or with impurity incorporation deteriorate the barrier height to 0.66 eV. The density and distribution of the interface states correlate well with the structural perfection. These results suggest that the barrier height is determined primarily by the structural perfection of the interface instead of the specific type of epitaxy.

Measurement of interface states in palladium silicon diodes

In this paper we present the results of a forward‐biased capacitance measurement on palladium silicon Schottky diodes. The data are interpreted in terms of the interface state density by taking into account the effect of series resistance and using Shockley–Read–Hall statistics. Exchange of charge between the metal and the interface states is included in the model. For the as‐deposited sample, an effective state is postulated to lie opposite the metal Fermi level with a concentration of 1×1012/cm2. Upon annealing and formation of palladium silicide, the density of states decreases by a factor of 2 and changes occur in the capture and emission time constants.

Determination of grain boundary barrier height and interface states by a focused laser beam

An experimental technique has been developed to study the electrical properties of semiconductor grain boundaries (GB’s) by a focused laser beam. The laser beam is trained on a GB while the photoconductivity of the sample is measured. This technique allows us to examine a localized region of an individual GB in semiconductors with multiple grains. The measurement of the steady state and transient signals as a function of temperature determines the grain boundary barrier height, trap energy, and capture cross section.

An improved differential voltage technique for capacitance measurement

Abstract A differential voltage capacitance technique is described for measuring the capacitance of forward-biased Schottky diodes. This technique is based on the concept of an improved admittance bridge. Difficulties arising from the high conductive component were solved or minimized. Data were obtained for NiSi and PdGaAs Schottky diodes with quality factors as low as 0.001. Compared to accurate phase capacitance spectroscopy and other bridge methods, this technique is more reliable and easier to operate.

Carrier confinement photoconductive detector

We propose a new device, the carrier confinement photoconductive detector, in which an improvement in performance over a conventional photoconductor is achieved by confinement of photogenerated carriers in the active channel. The confinement can be realized by placing a layer of a wide band‐gap semiconductor between the channel and ohmic contact. Analytical and numerical analyses show that gain‐bandwidth improvement of 100% can be achieved by using the GaAl/AlGaAs system.

Photoconductance transient response in polycrystalline silicon

The photoconductance transient response in polycrystalline silicon has been studied theoretically and experimentally. Shockley–Read–Hall statistics are used to describe the emission and capture processes at the grain‐boundary traps. Under appropriate conditions, the minority carrier capture and emission time constants of the grain‐boundary trap can be directly obtained from the photoconductance transient response. The photoconductance method is therefore useful for studying grain‐boundary deep level states. The special case when a focused laser spot is employed is also discussed. From the experimental data obtained from large‐grain Wacker polycrystalline silicon, we have discovered a donor‐like level at 0.48 eV below the conduction band with a concentration of 2×1010 cm−2. The electron (minority carrier) lifetime is found to be about 6×10−10–10−9 s.

Electronic Properties Of Grain Boundaries In Polycrystalline Silicon

The electrical characteristics of grain boundaries in polycrystalline silicon have been investigated. Experiments were performed using a focused laser beam to measure the GB parameters. Theoretical models of phonon-assisted and charge scattering processes are presented in relation to attenuation of the thermionic emission. The results indicate that the GB states behave as extrinsic impurity states which are not sensitive to the misorientation angle between grains. Both majority and minority carrier behavior are described.