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Dive into the research topics where H. García is active.

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Featured researches published by H. García.


Semiconductor Science and Technology | 2005

A comparative study of the electrical properties of TiO2 films grown by high-pressure reactive sputtering and atomic layer deposition

S. Dueñas; H. Castán; H. García; E. San Andrés; M. Toledano-Luque; I. Mártil; G. González-Díaz; Kaupo Kukli; Teet Uustare; Jaan Aarik

Oxide–semiconductor interface quality of high-pressure reactive sputtered (HPRS) TiO2 films annealed in O2 at temperatures ranging from 600 to 900 °C, and atomic layer deposited (ALD) TiO2 films grown at 225 or 275 °C from TiCl4 or Ti(OC2H5)4, and annealed at 750 °C in O2, has been studied on silicon substrates. Our attention has been focused on the interfacial state and disordered-induced gap state densities. From our results, HPRS films annealed at 900 °C in oxygen atmosphere exhibit the best characteristics, with Dit density being the lowest value measured in this work (5–6 × 1011 cm−2 eV−1), and undetectable conductance transients within our experimental limits. This result can be due to two contributions: the increase of the SiO2 film thickness and the crystallinity, since in the films annealed at 900 °C rutile is the dominant crystalline phase, as revealed by transmission electron microscopy and infrared spectroscopy. In the case of annealing in the range of 600–800 °C, anatase and rutile phases coexist. Disorder-induced gap state (DIGS) density is greater for 700 °C annealed HPRS films than for 750 °C annealed ALD TiO2 films, whereas 800 °C annealing offers DIGS density values similar to ALD cases. For ALD films, the studies clearly reveal the dependence of trap densities on the chemical route used.


Journal of Applied Physics | 2006

Influence of single and double deposition temperatures on the interface quality of atomic layer deposited Al2O3 dielectric thin films on silicon

S. Dueñas; H. Castán; H. García; A de Castro; L. Bailón; Kaupo Kukli; Aleks Aidla; Jaan Aarik; Hugo Mändar; Teet Uustare; Jun Lu; Anders Hårsta

An electrical characterization of Al2O3 based metal-insulator-semiconductor structures has been carried out by using capacitance-voltage, deep level transient spectroscopy, and conductance-transient (G-t) techniques. Dielectric films were atomic layer deposited (ALD) at temperatures ranging from 300 to 800 °C directly on silicon substrates and on an Al2O3 buffer layer that was grown in the same process by using 15 ALD cycles at 300 °C. As for single growth temperatures, 300 °C leads to the lowest density of states distributed away from the interface to the insulator [disorder-induced gap states (DIGS)], but to the highest interfacial state density (Dit). However, by using 300∕500°C double growth temperatures it is possible to maintain low DIGS values and to improve the interface quality in terms of Dit. The very first ALD cycles define the dielectric properties very near to the dielectric-semiconductor interface, and growing an upper layer at higher ALD temperature produces some annealing of interfacial s...


Journal of The Electrochemical Society | 2007

Electrical Properties of Atomic-Layer-Deposited Thin Gadolinium Oxide High-k Gate Dielectrics

S. Dueñas; H. Castán; H. García; A. Gómez; L. Bailón; Kaupo Kukli; Timo Hatanpää; Jun Lu; Mikko Ritala; M. Leskelä

Amorphous or cubic Gd2O3 thin films were grown from tris ( 2,3-dimethyl-2-butoxy)gadolinium( III) , Gd [OC(CH3)(2)CH(CH3)(2))(3)], and H2O precursors at 350 degrees C. As-deposited Gd2O3 films grown on etched (H-terminated) Si(100) exhibited better leakage current-voltage characteristics as well as lower flatband voltage shift than films grown on SiO2/ Si substrates. Interface trap densities were lower in Al/Gd2O3/ hydrofluoric acid (HF)-etched Si samples annealed at rather high temperatures.


Semiconductor Science and Technology | 2004

The electrical-interface quality of as-grown atomic-layer-deposited disordered HfO2 on p- and n-type silicon

S. Dueñas; H. Castán; H. García; J. Barbolla; Kaupo Kukli; Jaan Aarik; Aleks Aidla

HfO2 thin films were atomic-layer deposited using different-precursor partial pressures and at different growth temperatures on n- and p-type silicon substrates. The effect of processing parameters and film thickness on the electrical quality of the oxide–semiconductor interface was studied. Deep-level-transient spectroscopy and conductance-transient techniques revealed 3–10 × 1011 cm−2 eV−1 interface trap densities, somewhat dependent on the processing conditions. Charge trapping took place mainly between the semiconductor and defects located at energies close to the majority-carrier-semiconductor-band edge.


Journal of Applied Physics | 2008

Influence of interlayer trapping and detrapping mechanisms on the electrical characterization of hafnium oxide/silicon nitride stacks on silicon

H. García; S. Dueñas; H. Castán; A. Gómez; L. Bailón; M. Toledano-Luque; A. del Prado; I. Mártil; G. González-Díaz

Al/HfO2/SiNx:H/n-Si metal-insulator-semiconductor capacitors have been studied by electrical characterization. Films of silicon nitride were directly grown on n-type silicon substrates by electron cyclotron resonance assisted chemical vapor deposition. Silicon nitride thickness was varied from 3 to 6.6 nm. Afterwards, 12 nm thick hafnium oxide films were deposited by the high-pressure sputtering approach. Interface quality was determined by using current-voltage, capacitance-voltage, deep-level transient spectroscopy (DLTS), conductance transients, and flatband voltage transient techniques. Leakage currents followed the Poole–Frenkel emission model in all cases. According to the simultaneous measurement of the high and low frequency capacitance voltage curves, the interface trap density obtained for all the samples is in the 1011 cm−2 eV−1 range. However, a significant increase in this density of about two orders of magnitude was obtained by DLTS for the thinnest silicon nitride interfacial layers. In thi...


Journal of Vacuum Science & Technology B | 2009

Electrical properties of thin zirconium and hafnium oxide high-k gate dielectrics grown by atomic layer deposition from cyclopentadienyl and ozone precursors

S. Dueñas; H. Castán; H. García; A. Gómez; L. Bailón; Kaupo Kukli; Jaakko Niinistö; Mikko Ritala; M. Leskelä

ZrO2 and reference HfO2 films grown by atomic layer deposition from metal cyclopentadienyls and ozone as precursors to thicknesses ranging from 3.6to13.1nm on etched silicon showed electrical characteristics adequate to high-k dielectrics. The best results in terms of low interface state densities were obtained when (CpMe)2ZrMe2 precursor was used, with Cp denoting the cyclopentadienyl group (C5H5), and Me the methyl group (CH3). The ZrO2 films grown from (CpMe)2Zr(OMe)Me possessed nearly an order of magnitude higher trap state densities. Similar dependence on the precursor chemistry was observed upon recording the flatband voltage time transients. The flatband voltage transients, originating from phonon-assisted tunneling between localized states at oxide silicon interface, were the lowest in HfO2 films grown from (CpMe)2Hf(OMe)Me. The leakage current densities were also lower in the HfO2 films, compared to ZrO2. On the other hand, interfacial trap state densities in HfO2 based capacitors remained higher...


Semiconductor Science and Technology | 2007

Electrical properties of high-pressure reactive sputtered thin hafnium oxide high-k gate dielectrics

S. Dueñas; H. Castán; H. García; A. Gómez; L. Bailón; M. Toledano-Luque; I. Mártil; G. González-Díaz

Thin films of hafnium oxide have been deposited by the high-pressure reactive sputtering (HPRS) system. In this growth system the deposition pressure is around 1 mbar, three orders of magnitude higher than in the conventional ones, assuring that both reflected and sputtered particles reach the substrate with a low energy. The amorphous or polycrystalline structure is modified by adjusting the ratio of oxygen to argon of the sputtering gas. The electrical characteristics of both polycrystalline and amorphous films are compared. In all cases, the leakage current can be fitted to Poole–Frenkel emission. Amorphous films show the best characteristics in terms of capacitance–voltage behaviour, leakage current and interfacial state density, with conductance and flat-band voltage transients almost negligible.


Journal of Applied Physics | 2013

Experimental verification of intermediate band formation on titanium-implanted silicon

H. Castán; E. Pérez; H. García; S. Dueñas; L. Bailón; J. Olea; D. Pastor; E. García-Hemme; M. Irigoyen; G. González-Díaz

Intermediate band formation on silicon layers for solar cell applications was achieved by titanium implantation and laser annealing. A two-layer heterogeneous system, formed by the implanted layer and by the un-implanted substrate, was formed. In this work, we present for the first time electrical characterization results which show that recombination is suppressed when the Ti concentration is high enough to overcome the Mott limit, in agreement with the intermediate band theory. Clear differences have been observed between samples implanted with doses under or over the Mott limit. Samples implanted under the Mott limit have capacitance values much lower than the un-implanted ones as corresponds to a highly doped semiconductor Schottky junction. However, when the Mott limit is surpassed, the samples have much higher capacitance, revealing that the intermediate band is formed. The capacitance increasing is due to the big amount of charge trapped at the intermediate band, even at low temperatures. Ti deep levels have been measured by admittance spectroscopy. These deep levels are located at energies which vary from 0.20 to 0.28 eV below the conduction band for implantation doses in the range 10(13)-10(14) at./cm(2). For doses over the Mott limit, the implanted atoms become nonrecombinant. Capacitance voltage transient technique measurements prove that the fabricated devices consist of two-layers, in which the implanted layer and the substrate behave as an n(+)/n junction.


Journal of Vacuum Science & Technology B | 2009

Irradiation effect on dielectric properties of hafnium and gadolinium oxide gate dielectrics

H. García; S. Dueñas; H. Castán; A. Gómez; L. Bailón; R. Barquero; Kaupo Kukli; Mikko Ritala; M. Leskelä

Ionizing radiation effects on the electrical properties of HfO2, Gd2O3, and HfO2∕SiO2 based metal-oxide-semiconductor (MOS) capacitors have been studied. High-k dielectrics grown by atomic layer deposition and high-pressure Sputtering were exposed to photon radiation (18MeV photons). Capacitance-voltage curves, deep-level transient spectroscopy, conductance and flat-band voltage transients, and current-voltage techniques were used to characterize the samples. An increment in bulk dielectric trap densities has been observed when the samples were exposed to the ionizing radiation. These traps give rise to a flat-band voltage displacement, the extent of which depends on the gate dielectric used. High-k/silicon interface quality becomes worse after irradiation. An increment in the gate leakage current was also observed when irradiating the samples. Disorder-induced gap state density inside the insulator increases in the case of Gd2O3 MOS based samples, which seems to be the most affected by ionizing radiation.


Journal of Applied Physics | 2006

Experimental investigation of the electrical properties of atomic layer deposited hafnium-rich silicate films on n-type silicon

S. Dueñas; H. Castán; H. García; L. Bailón; Kaupo Kukli; Mikko Ritala; M. Leskelä; Mårten Rooth; Ola Wilhelmsson; Anders Hårsta

This work examines the structural and electrical properties of HfSixOy film based metal-insulator-semiconductor capacitors by means of x-ray diffraction, x-ray photoelectron spectroscopy, capacitance-voltage (C-V), deep level transient spectroscopy, and conductance transient (G-t) techniques. Hafnium-rich silicate films were atomic layer deposited onto HF-etched or SiO2 covered silicon. Although as-deposited samples exhibit high interfacial state and disorder-induced gap state densities, a postdeposition thermal annealing in vacuum under N2 flow for 1min at temperatures between 600 and 730°C clearly improves the interface quality. Marked crystallization and phase separation occurred at 800°C, increasing the structural heterogeneity and defect density in the dielectric oxide layers.

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H. Castán

University of Valladolid

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S. Dueñas

University of Valladolid

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L. Bailón

University of Valladolid

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A. Gómez

University of Valladolid

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M. Leskelä

University of Helsinki

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F. Campabadal

Spanish National Research Council

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G. González-Díaz

Complutense University of Madrid

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