Haidar M. Harmanani

A method for efficient mapping and reliable routing for NoC architectures with minimum bandwidth and area

Network-on-chip (NoC) is an on-chip communication methodology that has been proposed as an alternative to bus-based communication in order to cope with the increased complexity in embedded designs. This paper presents a method for assigning tasks to nodes in a 2-D mesh, and for determining the nodes positions on the mesh using simulated annealing. The method proposes a new efficient routing algorithm that minimizes blocking while increasing bandwidth throughput. The method is implemented and various benchmarks are attempted.

An evolutionary algorithm for solving the geometrically constrained site layout problem

Construction site layout has been recognized as an important activity in construction site planning by field practitioners and researchers alike. This problem involves coordinating the use of limited space to accommodate temporary facilities (such as fabrication shops, trailers, materials or equipment) so that transportation costs of resources are minimized. The layout problem considered in this paper is a static layout problem characterized by affinity weights used to model transportation costs between facilities and by geometric constraints between relative positions of facilities on site. This paper presents an investigation of applying an evolutionary approach to optimally solve the aforementioned layout problem. The proposed algorithm is two-phases: an initialization phase that generates an initial population of layouts through a sequence of mutation operations, and a reproduction phase that evolve the layouts generated in phase one through a sequence of genetic operations aiming at finding an optimal layout. The paper concludes with a number of examples illustrating the strength and limitations of the proposed approach.

A hybrid heuristic approach to optimize rule-based software quality estimation models

Software quality is defined as the degree to which a software component or system meets specified requirements and specifications. Assessing software quality in the early stages of design and development is crucial as it helps reduce effort, time and money. However, the task is difficult since most software quality characteristics (such as maintainability, reliability and reusability) cannot be directly and objectively measured before the software product is deployed and used for a certain period of time. Nonetheless, these software quality characteristics can be predicted from other measurable software quality attributes such as complexity and inheritance. Many metrics have been proposed for this purpose. In this context, we speak of estimating software quality characteristics from measurable attributes. For this purpose, software quality estimation models have been widely used. These take different forms: statistical models, rule-based models and decision trees. However, data used to build such models is scarce in the domain of software quality. As a result, the accuracy of the built estimation models deteriorates when they are used to predict the quality of new software components. In this paper, we propose a search-based software engineering approach to improve the prediction accuracy of software quality estimation models by adapting them to new unseen software products. The method has been implemented and favorable result comparisons are reported in this work.

An Ant Colony Optimization approach for test pattern generation

Test pattern generation is a challenging problem that has an exponential complexity that is aggravated with the continuous increase in circuits size. This paper deals with automatic test pattern generation (ATPG) for combinational circuits, and proposes a new approach based on ant colony optimization (ACO). The paper studies the opportunities offered by ACO in comparison with other simulated-based ATPGs. The method is implemented and is shown to efficiently generate a set of test vectors that achieve a high fault coverage in a short time. Several benchmark circuits are attempted, and favorable results comparisons are reported.

An optimal formulation for test scheduling network-on-chip using multiple clock rates

With the growing trend of increasing number of cores on a single chip, bus-based communication is suffering from bandwidth and scalability issues. As a result, the new approach is to use a network on chip (NoC) as the main communication system on a SoC. NoC provides the flexibility and scalability much needed in the era of multi-cores. NoC-based systems also provide the capability of multiple clocking that is widely used in many SoC nowadays. In this paper, an optimal integer linear programming (ILP) solution for test scheduling of cores in a NoC-based SoC using multiple clock rates is presented. Results on different benchmarks show the effectiveness of our techniques.

Thermal-aware test scheduling using network-on-chip under multiple clock rates

The increasing trend in the number of cores on a single chip has led to scalability and bandwidth issues in bus-based communication. Network-on-chip (NoC) techniques have emerged as a solution that provides a much needed flexibility and scalability in the era of multi-cores. This article presents an optimal integer linear programming (ILP) formulation and a simulated annealing (SA) solution to thermal and power-aware test scheduling of cores in an NoC-based SoC using multiple clock rates. The methods have been implemented and results on various benchmarks are presented.

A Simulated Annealing Algorithm for System-On-Chip Test Scheduling With Power and Precedence Constraints

This paper presents an efficient method to determine minimum system-on-chip (SOC) test schedules with precedence and power constraints based on simulated annealing. The problem is solved using a partitioned testing scheme with run to completion that minimizes the number of idle test slots. The method can handle SOC test scheduling with and without power constraints in addition to precedence constraints that preserve desirable orderings among tests. We present experimental results for various SOC examples that demonstrate the effectiveness of the method. The method achieved optimal test schedules in all attempted cases in a short CPU time.

An Efficient Method for the Open-Shop Scheduling Problem Using Simulated Annealing

This paper presents a simulated annealing algorithm in order to solve the nonpreemptive open-shop scheduling problem with the objective of minimizing the makespan. The method is based on a simulated annealing algorithm that efficiently explores the solution space. The method was implemented and tested on various benchmark problems in the literature. Experimental results show that the algorithm performs well on the benchmarks. The algorithm was able to find an optimum solution in many cases.

A method for efficient NoC test scheduling using deterministic routing

Network-on-Chip (NoC) is an on-chip communication methodology that has been proposed as an alternative to bus-based communication in order to cope with the increased complexity in embedded designs. This paper presents a method for NoCs test scheduling using simulated annealing. The method uses a deterministic routing algorithm that minimizes test time while avoiding blocking. The method is implemented and various benchmarks are attempted.

Predicting stability of classes in an object-oriented system

The stability of a class in object-oriented system is one software quality characteristic that is important to assess at the early development stages. However, a direct measure of this software quality characteristic is not possible. Nonetheless, it can be predicted based on other measurable software attributes such as cohesion, coupling, and complexity. Many metrics have been proposed to assess these software attributes and for this purpose, prediction models have been widely used. However, in almost all cases, these models were not efficient when used to predict the quality characteristics (stability or other) of new unseen software as their prediction accuracy decreases significantly. In this paper, we present a heuristic approach that relies on the adaptation and recombination of already built predictive models to new unseen software.The predictive models are all rule-based models and the approach is tested on the stability of classes in an object-oriented software system. We compare our results to the machine learning algorithm C4.5, and we show that our approach out-beats it.