Haili Zhou

A Digital Switching Demodulator for Electrical Capacitance Tomography

In this paper, a digital switching demodulator is presented for use in ac-based electrical capacitance tomography systems. Implementing a switching phase-sensitive demodulator (PSD) digitally offers the following advantages: 1) Demodulation can be implemented using a programmable digital device, and hence, CMOS switches, which are used in a conventional switching PSD, are no longer needed; 2) compared with the widely used digital quadrature PSD, this proposed demodulator is simple in configuration because neither a reference signal nor multiplication is required; 3) according to the specific requirements, the new demodulator can be implemented in two operation modes, i.e., the amplitude mode and the phase-sensitive mode; and 4) because only subtractions and accumulations are needed, the proposed demodulator can be easily implemented with low-cost logic devices, e.g., a complex programmable logic device (CPLD). By simulation, the feasibility and effectiveness of the proposed demodulator have been confirmed. CPLD-based and field-programmable-gate-array-based capacitance measurement circuits are constructed, and the performances of different demodulation methods are compared. Both simulation and experiment show that the proposed demodulator can provide demodulation results with high signal-to-noise ratio. The system design can be simplified using the digital switching demodulator.

A recursive least squares-based demodulator for electrical tomography

In this paper, a recursive least squares (RLS)-based demodulator is proposed for Electrical Tomography (ET) that employs sinusoidal excitation. The new demodulator can output preliminary demodulation results on amplitude and phase of a sinusoidal signal by processing the first two sampling data, and the demodulation precision and signal-to-noise ratio can be further improved by involving more sampling data in a recursive way. Thus trade-off between the speed and precision in demodulation of electrical parameters can be flexibly made according to specific requirement of an ET system. The RLS-based demodulator is suitable to be implemented in a field programmable gate array (FPGA). Numerical simulation was carried out to prove its feasibility and optimize the relevant parameters for hardware implementation, e.g., the precision of the fixed-point parameters, sampling rate, and resolution of the analog to digital convertor. A FPGA-based capacitance measurement circuit for electrical capacitance tomography was constructed to implement and validate the RLS-based demodulator. Both simulation and experimental results demonstrate that the proposed demodulator is valid and capable of making trade-off between demodulation speed and precision and brings more flexibility to the hardware design of ET systems.

A complex programmable logic device-based high-precision electrical capacitance tomography system

In this paper, a high-precision measurement system for electrical capacitance tomography (ECT) is presented. A low-cost complex programmable logic device (CPLD) is employed to accomplish logic control, signal generation, data acquisition, digital demodulation and communication with the aid of external components. By adopting a simple digital demodulator recently developed by the authors, the demodulation to ac signals becomes rather simple and resource-saving. A double-T-switches configuration is developed to improve the precision and lower the limit of multi-channel capacitance measurement. A capacitance network is constructed for system calibration. A square ECT sensor with 16 electrodes is constructed to test the practical performance of the measurement system. With a data acquisition rate of 185 frame s−1, the signal-to-noise ratio and standard deviation of capacitance measurement can reach up to 70 dB and 0.09 fF, respectively. Image reconstruction experiment has validated the CPLD-based ECT system.

Image Reconstruction for Invasive ERT in Vertical Oil Well Logging

Abstract An invasive electrical resistance tomographic sensor was proposed for production logging in vertical oil well. The sensor consists of 24 electrodes that are fixed to the logging tool, which can move in the pipeline to acquire data on the conductivity distribution of oil/water mixture flow at different depths. A sensitivity-based algorithm was introduced to reconstruct the cross-sectional images. Analysis on the sensitivity of the sensor to the distribution of oil/water mixture flow was carried out to optimize the position of the imaging cross-section. The imaging results obtained using various boundary conditions at the pipe wall and the logging tool were compared. Eight typical models with various conductivity distributions were created and the measurement data were obtained by solving the forward problem of the sensor system. Image reconstruction was then implemented by using the simulation data for each model. Comparisons between the models and the reconstructed images show that the number and spatial distribution of the oil bubbles can be clearly identified.

Four-Terminal Imaging Using a Two-Terminal Electrical Impedance Tomography System

Electrical impedance tomography (EIT) is a promising visualization measurement technique to reconstruct media distribution in a region of interest (ROI) through impedance measurements on its boundary. In this paper, a two-to-four-terminal mode is proposed for a two-terminal EIT system to take advantage of the four-terminal imaging mechanism. Using the two-to-four-terminal mode, data are acquired using the two-terminal EIT system, whereas the imaging mechanism is based on the four-terminal mode. To realize four-terminal imaging using a two-terminal EIT system, the mapping formulas of data from the two- to four-terminal mode and vice versa are derived. A novel imaging method based on two-to-four-terminal mode is proposed to decrease the ill conditionedness of the relevant inverse problem and implemented with the conjugate gradient iteration algorithm and the Tikhonov regularization algorithm, respectively. Simulation and experimental results validate the feasibility and effectiveness of the proposed method in reconstructing inclusions within the ROI clearly and exactly in both shape and location. Compared with the method based on two-terminal mode, the quality of the images reconstructed using the proposed method can be improved in terms of contrast, resolution, and antiartifact, i.e., reducing the artifacts in the reconstructed images, especially when distinguishing complicated distributions. Meanwhile, the imaging speed is also increased. Moreover, the availability of four-terminal imaging mechanism in a two-terminal EIT system makes it more flexible to choose an appropriate mode according to the application requirements and available instruments.

An alternative digital multiplication demodulation method for electrical capacitance tomography

In this paper, a new digital demodulation method was proposed for capacitance measurement in AC-based electrical capacitance tomography (ECT) systems. The proposed demodulation method can be carried out in the following steps: (1) measure the phase difference between the in-phase reference signal, i.e., the digital form of the excitation signal, and the digitalized measurement signal by using the SignalTap II Logic Analyzer integrated in FPGA development kits; (2) delay the in-phase reference signal by a specified number of sampling periods according to the phase difference obtained in step (1) to ensure that the adjusted reference signal is completely in phase with the digitalized measurement signal; (3) multiply the digitalized measurement signal with the delayed reference signal point-by-point within one sine wave period, and then accumulate the products to obtain the demodulation result. The feasibility and effectiveness of the proposed digital demodulation method has been analyzed and verified by experimental results. Compared with the commonly used digital quadrature demodulation method, the proposed method can save resources of logic, memory and multiplier elements in the FPGA to a large extent without decreasing the signal to noise ratio (SNR) of the measurement result.

DC bias compensation in digital AC-based capacitance measurement for ECT

The AC-based capacitance measuring circuits are widely used in electrical capacitance tomography. In the circuit, the desired exciting and measuring signals are alternative current (AC) ones that should have a zero direct current (DC) component. However, because of the non-deal characteristics of the operational amplifiers and other electronic components, DC biases, i.e., nonzero DC components always exist in actual AC signals. The DC biases have negative influences on capacitance measurement. In the paper, theoretical analysis was carried out and a method of compensating the effect of the DC bias was introduced. A digital AC-based capacitance measuring system was constructed to implement the compensation method. Experimental results show that the signal-to-noise ratio of the system is improved by employing the proposed method.

A digital demodulation method for electrical tomography based on sine wave rectification

In this paper, a digital demodulation method used for AC-based electrical tomography systems is presented. The demodulation result can be easily obtained by rectifying the sinusoidal measurement signal in a digital way. The proposed demodulation method has some distinguished characteristics: (a) with a concise configuration, it can be implemented on simple digital signal processors without hardware multipliers, e.g. Complex Programmable Logic Device (CPLD); (b) no reference signals are involved, (c) according to the requirements of precision and Signal-to-Noise Ratio (SNR), the demodulation process can be accomplished within k/2 (k=1, 2, 3, ...) sine wave periods; and (d) the effectiveness of the proposed method is not influenced by the starting time of demodulation. Mathematical analysis and numerical simulation results are presented to prove the feasibility and effectiveness of the digital demodulation method based on sine wave rectification.