Hamide Kavak

Patterning Sub-50 nm features with near-field embedded-amplitude masks

Sub-50 nm lines, holes, and posts have been patterned photolithographically using near-field embedded-amplitude masks and an exposing wavelength of 220 nm generated by an arc-lamp source. Interference in the optical near field is utilized to produce the fine patterns. In some cases, the feature sizes on the mask are more than six times larger than the size of the smallest features patterned on the substrate. Numerical simulations support the experimental results.

The effect of annealing on structural and optical properties of ZnO thin films grown by pulsed filtered cathodic vacuum arc deposition

Thin ZnO films were deposited at room temperature on glass substrates by a pulsed filtered cathodic vacuum arc deposition system. The crystallographic structure and the size of the crystallites in the films were studied by means of x-ray diffraction. These measurements show that all the films are crystallized in the wurtzite form, present in a preferred orientation along the (002) direction, and the grain size is estimated to be 18.9–42 nm. The crystallite sizes were found to increase and the x-ray diffraction patterns were sharpened by annealing. Optical properties of the ZnO films were studied using a UV–visible spectrometer and calculations made using the envelope method. The absorption coefficient and optical band gap of the films were increased while the refractive index was decreased by annealing. The best annealing temperature for pulsed cathodic vacuum arc deposition grown ZnO thin films on glass substrates was found to be 600 °C from optical properties. This temperature is as high as can be measured for glass substrates samples because of the glass properties.

Thin film transistors on polyimide substrates

Abstract The properties of individual inverted gate, thin film transistors (TFT) with a range of channel width to length from 2/2 to 4780/4 fabricated on 5 μm thick polyimide substrates have been investigated. In addition to the room temperature properties, the effects of illumination, bias stress and temperature have been measured. The current as a function of voltage of the TFTs scale linearly with transistor size and the threshold voltages are independent of size. Illumination of the transistors increases the off current and decreases the threshold voltage. Gate characteristics were determined for transistors before and after a bias stress of V GS =20 V for t =10, 10 2 , 10 3 and 10 4 s. The threshold voltage shifted to larger voltages and the on/off ratio decreased with application time. Gate and transfer characteristics of the TFTs were measured every 25°C from 25°C to 125°C. The threshold voltages decreased with increasing temperature while field effect mobilities increased.