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Dive into the research topics where Hans Kunz is active.

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Featured researches published by Hans Kunz.


electrical overstress/electrostatic discharge symposium | 2004

Formation and suppression of a newly discovered secondary EOS event in HBM test systems

Tom Meuse; Larry Ting; Joe Schichl; Robert Barrett; David Bennett; Roger A. Cline; Charvaka Duvvury; Mike Hopkins; Hans Kunz; John Leiserson; Robert Steinhoff

A previously undetected trailing pulse from HBM testers was found to create unexpected gate oxide failures on new technologies. This secondary pulse, which is EOS in nature, is caused by the discharge relay and the parasitics of the charge circuit. This paper investigates this critical phenomenon and establishes the tester improvements to safely suppress the trailing pulse effects.


international reliability physics symposium | 2012

Engineering optimal high current characteristics of high voltage DENMOS

Akram A. Salman; Farzan Farbiz; Aravind C. Appaswamy; Hans Kunz; Gianluca Boselli; Mariano Dissegna

This paper demonstrates the dramatic improvement in ESD performance of HV DENMOS and LDMOS obtained by using selective drain extension silicide blocking (SBLK). The results are validated through 3D TCAD and TLP measurements on different technologies. Measured D.C. Id-Vd characteristics show minimal performance impact due to the addition of SBLK region.


international reliability physics symposium | 2004

A PMOSFET ESD failure caused by localized charge injection

Jung-Hoon Chun; C. Duvvury; Gianluca Boselli; Hans Kunz; Robert W. Dutton

A new failure mechanism of PMOSFET devices under ESD conditions is reported and analyzed by investigating various I/O structures. Localized turn-on of the parasitic pnp transistor can be caused by localized charge injection into the body of the PMOSFET. Critical layout parameters affecting this problem are discussed based on 2-D device simulations. A general strategy for avoiding this failure mode is also suggested.


electrical overstress/electrostatic discharge symposium | 2004

Gate oxide failures due to anomalous stress from HBM ESD testers

Charvaka Duvvury; Robert Steinhoff; Gianluca Boselli; Vijay Reddy; Hans Kunz; Steve Marum; Roger A. Cline


electrical overstress electrostatic discharge symposium | 2010

The relevance of long-duration TLP stress on system level ESD design

Gianluca Boselli; Akram A. Salman; Jonathan Brodsky; Hans Kunz


electrical overstress electrostatic discharge symposium | 2012

A flexible simulation model for system level ESD stresses with application to ESD design and troubleshooting

Robert Mertens; Hans Kunz; Akram A. Salman; Gianluca Boselli; Elyse Rosenbaum


electrical overstress/electrostatic discharge symposium | 2006

HBM stress of no-connect IC pins and subsequent arc-over events that lead to human-metal-discharge-like events into unstressed neighbor pins

Hans Kunz; Charvaka Duvvury; Jonathan Brodsky; Partha Chakraborty; Agha Jahanzeb; Steve Marum; Larry Ting; Joe Schichl


electrical overstress electrostatic discharge symposium | 2010

An automated ESD verification tool for analog design

Hans Kunz; Gianluca Boselli; Jonathan Brodsky; Minas Hambardzumyan; Ryan W. Eatmon


electrical overstress/electrostatic discharge symposium | 2004

The effect of high pin-count ESD tester parasitics on transiently triggered ESD clamps

Hans Kunz; Robert Steinhoff; Charvaka Duvvury; Gianluca Boselli; Larry Ting


electrical overstress electrostatic discharge symposium | 2010

Solutions to mitigate parasitic NPN bipolar action in high voltage analog technologies

Akram A. Salman; Gianluca Boselli; Hans Kunz; Jonathan Brodsky

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