Harold G. Parks

A Comparative Electrochemical Study of Copper Deposition onto Silicon from Dilute and Buffered Hydrofluoric Acids

An electrochemical direct current polarization method was used to investigate characteristics of copper deposition onto silicon from dilute and buffered hydrofluoric acid solutions. The corrosion current density and corrosion potential of silicon were not very sensitive to the Cu 2+ concentration, up to 1000 parts per billion, in buffered hydrofluoric acid. However, the extent of copper deposition, as measured by total reflection X-ray fluorescence, increased as the Cu 2+ concentration in solution increased. In dilute hydrofluoric acid, Cu 3+ addition had a significant and systematic effect on the corrosion potential and corrosion current density of silicon. However, in both types of solution, the cathodic current calculated from the measured copper deposition was found to be only a small fraction of the corrosion current (less than 1%). This indicates that the primary cathodic reaction is not copper ion reduction but hydrogen ion reduction. Illumination affected the electrochemical behavior of both p- and n-type silicon in Cu 2+ spiked dilute hydrofluoric acid, but only that of p-type silicon in buffered hydrofluoric acid.

Electrochemical Impedance Spectroscopy of Copper Deposition on Silicon from Dilute Hydrofluoric Acid Solutions

Electrochemical impedance spectroscopy was used to probe the mechanism of copper deposition on silicon from dilute hydrofluoric acid solutions. Reaction parameters such as polarization resistance and space-charge capacitance were evaluated using an equivalent circuit model. The electrochemical impedance technique was found to be sensitive to parts per billion levels of Cu 2+ ion in dilute hydrofluoric acid solutions. An inductive loop appeared in Nyquist plots only when Cu 2+ ions were present in hydrofluoric acid solutions. Both the polarization resistance and inductance decreased significantly as the solution Cu 2+ concentration increased. Addition of a nonionic surfactant to hydrofluoric acid solutions significantly altered impedance characteristics of the silicon/solution interface. Total reflection X-ray fluorescence results showed that illumination enhanced deposition of copper on silicon nearly an order of magnitude.

Electrochemical Investigation of Copper Contamination on Silicon Wafers from HF Solutions

Copper contamination of silicon wafers from 50 :1 HF solutions containing 0 to 100 ppb Cu was studied using dc electrochemical techniques. As the level of copper concentration in HF solutions increased, the corrosion current density and corrosion potential of silicon as well as the amount of copper deposition were increased. Upon addition of a nonionic surfactant, the corrosion potential, corrosion current density, and the extent of copper deposition were decreased. However, the levels of deposited copper and surface roughness were dependent on surfactant concentration. When H 2 O 2 was added to copper-spiked HF solutions, the open-circuit potential of silicon recovered to a value that is characteristic for silicon immersed in a mixture of H 2 O 2 and HF indicating the removal of deposited copper on silicon.

Deposition Characteristics of Metal Contaminants from HF ‐ Based Process Solutions onto Silicon Wafer Surfaces

Metal contamination levels are a growing concern in integrated circuit manufacturin because they degrade electrical performance. This work uses statistical design of experiments to determine deposition characteristics of metal contaminants onto silicon surfaces from process chemicals that are used in wafer cleaning. Copper, gold, molybdenum, silver, lead, chromium, tin, titanium, manganese, and tungsten were added to buffered oxide etchant and HF solutions. Wafers were immersed in these solutions and evaluated by total reflectance x-ray fluorescence spectroscopy surface analysis

Quantifying the impact of homogeneous metal contamination using test structure metrology and device modeling

Deposition of metallic impurities from HF process solutions has been investigated experimentally and explained theoretically in a qualitative manner. The depositions are shown to be electrochemical in nature in that an oxidation reduction reaction results in metal ions in solution depositing on the wafer as elements with an oxidation state of 0. The theory is only qualitative in that it can only predict which metals will deposit, not how much. Experimentally, simple transmission equations can be determined which relate metallic contamination levels on Si wafer surfaces (atoms/cm/sup 2/) to metal concentration in the solution (ppb). Simple test structures have been fabricated with known amounts of iron and copper contamination in the pregate oxide clean of a 1.25 /spl mu/m CMOS process. Device measurements indicate device degradation in the case of copper, confirming deposition studies that copper deposits from HF solutions. Iron contaminated wafers show no contamination related device effects, in support of theoretical predictions and deposition studies indicating iron does not deposit from HF solutions. The importance and potential usefulness of test structures as homogeneous contamination monitors is illustrated through device modeling of the contamination effects observed in the test structures that can then be used to estimate the effects of such contamination on ULSI circuit performance. >

Deposition of copper from a buffered oxide etchant onto silicon wafers

The deposition of copper from a buffered oxide etchant (BOE) onto bare silicon, silicon dioxide, and patterned silicon wafers has been investigated. Deposition does not occur on surfaces of silicon dioxide, while deposition on regions of patterned silicon dioxide are observed at levels which fall between the deposition on bare silicon and silicon dioxide. The duration of a wafer rinse, which follows each immersion into a BOE solution, the silicon material as well as substrate doping do not affect the amount of deposition. The process of copper deposition from a BOE solution occurs uniformly across the surface of the wafer. The deposition on bare silicon surfaces shows an Arrhenius behavior, with two distinct activation energies: 0.40 eV (38.6 kJ mol -1 ) when the surface concentration is less than 6×10 14 Cu atom cm -2 and 0.20 eV (19.3 kJ mol -1 ) when the surface concentration is greater than 6×10 14 Cu atom cm -1 . Surface roughness is observed to increase with the extent of deposition. An electrochemical reduction is used to describe the deposition of copper onto a silicon surface from a BOE solution

Effects of moisture on Fowler–Nordheim characterization of thin silicon-oxide films

A conducting-tip atomic force microscope was used as a Fowler–Nordheim characterization tool of thin silicon oxides. The system was operated under a controlled environment using novel cantilevers fabricated from platinum/iridium wire and nickel foil. With this tool, humidity-dependent field-induced oxidation of the samples and variations in the tunneling current due to uneven water layer coverage were investigated. It is shown that baking the samples and characterizing them under a dry environment alleviates problems arising from the humid environment.

VHDL-AMS Modeling of Total Ionizing Dose Radiation Effects on CMOS Mixed Signal Circuits

A hierarchical method for total dose effects simulation of large mixed signal circuits using VHDL-AMS is described. Simplified behavioral models (or macro-models) of small sub-circuits replace SPICE-level circuits. The behavioral models describe the electrical circuit behavior and its dependence on the radiation dose. The behavioral models of sub-circuits can be assembled into complex mixed signal circuits. As a result, the computational cost is reduced significantly compared to conventional SPICE-based methods. The VHDL-AMS method also allows bias-dependent total dose degradation to be coupled to the circuit and operational conditions. Simulation accuracy remains sufficient to determine critical performance metrics of the circuit as the circuit performance degrades with dose.

Research accomplishments at the University of Arizona SEMATECH Center of Excellence for contamination/defect assessment and control

The Arizona SEMATECH Center of Excellence (SCOE) was established in May of 1988, is funded by SEMATECH and contractually monitored by the Semiconductor Research Corporation (SRC). The SCOE is engaged in research in a broad front to understand and control contamination which causes yield limiting defects in submicron ULSI circuits. Sandia National Laboratory personnel are integrated with UA personnel in the SCOE research. The focus of the research is on contaminants, both particulates and homogeneous or distributed, which originate in, are caused by, or are transported and deposited by process gases and chemicals or process equipment. Further, the work involves investigating the mapping from contaminants and contaminant levels to degradation of device properties. The resulting degradation in device properties can then be used to estimate the effects of such contaminants for submicron processes and circuits. Results achieved during the four years of the SCOEs existence are described in this paper. >

A generalized model for the lifetime of microelectronic components, applied to storage conditions

Abstract To improve the quality of microcircuit lifetime prediction in storage and non-operating conditions, a new model, based on physical principles and generally applicable to microcircuits, is proposed. This model is derived from the fundamentals of manufacturing yield statistics and uses compound Poisson statistics with a time-dependent negative binomial shaping function. Comparison of the model to statistical distributions created from available data shows that the model is applicable to many situations that may occur in actual populations.