Haruo Nakazawa

Hybrid isolation process with deep diffusion and V-groove for reverse blocking IGBTs

We newly developed a 1200V Reverse Blocking (RB)-IGBT used to form bi-directional switches in advanced Neutral-Point-Clamped (A-NPC) 3-Level modules. It featured a hybrid through-silicon isolation structure combining wafer front-side boron deep diffusion with back-side V-groove etching. Collector layer was implanted into the back-side and the surface of the V-grooves, and electrically connected to the front-side boron diffusion after activation to achieve reverse-blocking capability. Thermal budget for the surface deep boron diffusion was thereby shortened more than a half of that in full diffusion case to improve both throughput and yield. Sufficient reverse blocking capability was experimentally verified.

Super Junction MOSFETs above 600V with Parallel Gate Structure Fabricated by Deep Trench Etching and Epitaxial Growth

600 V class superjunction (SJ) MOSFETs fabricated by deep-trench etching and epitaxial growth method are experimentally investigated. Planar SJ MOSFETs with both parallel and orthogonal gate structures are fabricated. The SJ MOSFET with parallel gate structure exhibits an improved specific on-resistance of 17 mOmegaldrcm2, which is about 30% lower than that of orthogonal gate structures with the same breakdown voltage of 650 V.

Silicon carbide wafer bonding by modified surface activated bonding method

4H-SiC wafer bonding has been achieved by the modified surface activated bonding (SAB) method without any chemical-clean treatment and high temperature annealing. Strong bonding between the SiC wafers with tensile strength greater than 32 MPa was demonstrated at room temperature under 5 kN force for 300 s. Almost the entire wafer has been bonded very well except a small peripheral region and few voids. The interface structure was analyzed to verify the bonding mechanism. It was found an amorphous layer existed as an intermediate layer at the interface. After annealing at 1273 K in vacuum for 1 h, the bonding tensile strength was still higher than 32 MPa. The interface changes after annealing were also studied. The results show that the thickness of the amorphous layer was reduced to half after annealing.

Room-temperature wafer bonding of SiC–Si by modified surface activated bonding with sputtered Si nanolayer

A modified surface activated bonding (SAB) with Fe–Si multi-nanolayers is expected to achieve the wafer bonding of SiC to various materials. However, Fe diffusion, which affects device performance, cannot be avoided during some annealing processes. In this work, the room-temperature wafer bonding of SiC–Si by only one sputtered Si nanolayer was successfully achieved. The bonding interface was investigated. A uniform intermediate layer with a thickness of ~15 nm just containing Si, C, and Ar was found at the interface. The bonding strength between the SiC surface and the sputtered Si nanolayer could reach the bulk Si strength in accordance with the results of the strength test. This indicates that the wafer bonding of SiC to any other materials can be achieved easily if the material could be also strongly bonded to the sputtered Si nanolayer. In addition, the thermal and chemical reliabilities of the SiC–Si bonding interface were investigated by rapid thermal annealing and KOH etching, respectively.

A comparison study: Direct wafer bonding of SiC–SiC by standard surface-activated bonding and modified surface-activated bonding with Si-containing Ar ion beam

In this study, the results of direct wafer bonding of SiC–SiC at room temperature by standard surface-activated bonding (SAB) and modified SAB with a Si-containing Ar ion beam were compared, in terms of bonding energy, interface structure and composition, and the effects of rapid thermal annealing (RTA) at 1273 K in Ar gas. Compared with that obtained by the standard SAB, the bonding interface obtained by the modified SAB with a Si-containing Ar ion beam is ~30% stronger and almost completely recrystallized without oxidation during RTA, which should be due to the in situ Si compensation during surface activation by the Si-containing Ar ion beam.

SiC wafer bonding by modified suface activated bonding method

3-inch 4H-SiC wafer bonding has been achieved by the modified surface activated bonding (SAB) method without any chemical-clean treatment and high temperature annealing. Strong bonding of the SiC wafers, greater than 32MPa (tensile strength), was demonstrated at room temperature under 5kN force for 300 seconds. Almost the entire wafer has been bonded very well except the small outermost region and few voids. The interface structure was analyzed to explore the bonding mechanism. An amorphous layer was found to be as the intermediate layer at the interface. Furthermore, to verify the stability of the interface, the interface changes after annealing were studied.

Precipitates formed in silicon wafers by prolonged high-temperature annealing in nitrogen atmosphere

A floating zone (FZ) silicon wafer produced from a Czochralski (CZ) single-crystal ingot was subjected to prolonged annealing at a high temperature in a N2 (70%) + O2 (30%) ambient. Precipitates were formed and their regions manifested themselves as dark concentric rings in an X-ray topograph. According to the results of cross-sectional transmission electron microscopy and energy-dispersive X-ray spectroscopy elemental analysis, nitrogen was distributed throughout the precipitate regions, while oxygen concentrated in the periphery of the regions. Fourier transform infrared spectroscopy analysis of the precipitate regions revealed that the concentration of nitrogen was high, while that of oxygen was low. A high nitrogen concentration was also directly detected by secondary ion mass spectrometry in the mid-depth of the wafer in the precipitate regions. Electron diffraction analysis of the precipitates showed that their phase was α-Si3N4. The number of precipitates detected by cross-sectional X-ray topography increased with increasing annealing time. The precipitates were considered to originate from vacancies that can be eliminated by interstitial silicon.

Deep level transient spectroscopic analysis of p/n junction implanted with boron in n-type silicon substrate

For P-i-N diodes implanted and activated with boron ions into a highly-resistive n-type Si substrate, it is found that there is a large difference in the leakage current between relatively low temperature furnace annealing (FA) and high temperature laser annealing (LA) for activation of the p-layer. Since electron trap levels in the n-type Si substrate is supposed to be affected, we report on Deep Level Transient Spectroscopy (DLTS) measurement results investigating what kinds of trap levels are formed. As a result, three kinds of electron trap levels are confirmed in the region of 1–4u2009μm from the p-n junction. Each DLTS peak intensity of the LA sample is smaller than that of the FA sample. In particular, with respect to the trap level which is the closest to the silicon band gap center most affecting the reverse leakage current, it was not detected in LA. It is considered that the electron trap levels are decreased due to the thermal energy of LA. On the other hand, four kinds of trap levels are confirmed in the region of 38–44u2009μm from the p-n junction and the DLTS peak intensities of FA and LA are almost the same, considering that the thermal energy of LA has not reached this area. The large difference between the reverse leakage current of FA and LA is considered to be affected by the deep trap level estimated to be the interstitial boron.For P-i-N diodes implanted and activated with boron ions into a highly-resistive n-type Si substrate, it is found that there is a large difference in the leakage current between relatively low temperature furnace annealing (FA) and high temperature laser annealing (LA) for activation of the p-layer. Since electron trap levels in the n-type Si substrate is supposed to be affected, we report on Deep Level Transient Spectroscopy (DLTS) measurement results investigating what kinds of trap levels are formed. As a result, three kinds of electron trap levels are confirmed in the region of 1–4u2009μm from the p-n junction. Each DLTS peak intensity of the LA sample is smaller than that of the FA sample. In particular, with respect to the trap level which is the closest to the silicon band gap center most affecting the reverse leakage current, it was not detected in LA. It is considered that the electron trap levels are decreased due to the thermal energy of LA. On the other hand, four kinds of trap levels are confirme...

SiC wafer bonding using surface activation method for power device

This study compared the results of room temperature direct wafer bonding of SiC-SiC accomplished by standard surface activated bonding (SAB) and modified SAB with a Si-containing Ar ion beam, in terms of bonding energy, interface structure and composition as well as the effects of rapid thermal annealing (RTA). Compared with that obtained by standard SAB, the bonding interface of modified SAB with a Si-containing Ar ion beam could be ∼30% stronger and almost completely recrystallized by RTA without oxidation. The advantages of modified SAB with a Si-containing Ar ion beam are attributed to the assumed in-situ Si-compensation during surface activation.

Room temperature SiC-SiC direct wafer bonding by SAB methods

Room temperature direct wafer bonding of SiC-SiC by standard surface-activated bonding (SAB) and modified SAB with a Si-containing Ar ion beam were compared in terms of bonding energy, interface structure and composition. Compared with that obtained by standard SAB, the bonding interface obtained by modified SAB with a Si-containing Ar ion beam is >30% stronger, which should be due to the in situ Si compensation during surface activation by the Si-containing Ar ion beam.