Heinz Lendenmann

Recombination-enhanced defect motion in forward-biased 4H–SiC p-n diodes

The generation and evolution of defects in 4H–SiC p-n junctions due to carrier injection under forward bias have been investigated by synchrotron white beam x-ray topography, electroluminescence imaging, and KOH etching. The defects are Shockley stacking faults with rhombic or triangular shapes bound by partial dislocation loops with dislocation lines along Peierls valleys (〈11-20〉) or along the intersection of the basal plane containing the fault and diode surface. The Burgers vector of all bounding partials was of 1/3〈10-10〉-type. Among six possible types of partial dislocations with these properties, only two were observed in the volume of the epitaxial structure. One was tentatively identified as 30° carbon-core [C(g) 30°] and second as 30° silicon-core [Si(g) 30°] partial dislocation. Only one of them [proposed to be the Si(g) 30° partial] have been observed to move and emit light under forward bias. The other type of bounding dislocation [C(g) 30°] remained stationary during current injection. Low a...

Nucleation sites of recombination-enhanced stacking fault formation in silicon carbide p-i-n diodes

The morphology and nucleation sites of stacking faults formed during the forward operation of 4H silicon carbide p-i-n diodes were investigated using optical emission microscopy (OEM) and transmission electron microscopy (TEM). Partial dislocations bounding the stacking faults are mostly aligned to the 〈11–20〉 directions with Burgers vectors of the 1/3〈1–100〉 type. Arrays of dislocation half loops in the blocking layer serve as nucleation sites of double-rhombic stacking faults. The morphology of these stacking faults indicates that short basal plane segments associated with threading dislocations are the origin of rhombic stacking faults. All dislocations in a half-loop array have the same Burgers vector and nucleate on a single basal plane, which was evidenced by the merging of double-rhombic stacking faults. Most pre-existing basal plane dislocations within the blocking layer which are visible in OEM images dissociate to form stacking faults during the degradation. Basal plane dislocations aligned alon...

Techniques for Minimizing the Basal Plane Dislocation Density in SiC Epilayers to Reduce Vf Drift in SiC Bipolar Power Devices

Forward voltage instability, or Vf drift, has confounded high voltage SiC device makers for the last several years. The SiC community has recognized that the root cause of Vf drift in bipolar SiC devices is the expansion of basal plane dislocations (BPDs) into Shockley Stacking Faults (SFs) within device regions that experience conductivity modulation. In this presentation, we detail relatively simple procedures that reduce the density of Vf drift inducing BPDs in epilayers to <10 cm-2 and permit the fabrication of bipolar SiC devices with very good Vf stability. The first low BPD technique employs a selective etch of the substrate prior to epilayer growth to create a near on-axis surface where BPDs intersect the substrate surface. The second low BPD technique employs lithographic and dry etch patterning of the substrate prior to epilayer growth. Both processes impede the propagation of BPDs into epilayers by preferentially converting BPDs into threading edge dislocations (TEDs) during the initial stages of epilayer growth. With these techniques, we routinely achieve Vf stability yields of up to 90% in devices with active areas from 0.006 to 1 cm2, implying that the utility of the processes is not limited by device size.

Core structure and properties of partial dislocations in silicon carbide p-i-n diodes

The electroluminescence, mobility, and core nature of partial dislocations bounding stacking faults in 4H silicon carbide p-i-n diodes were investigated using optical emission microscopy and transmission electron microscopy (TEM). The stacking faults developed and expanded in the blocking layer during high current forward biasing. Their bounding partial dislocations showed two distinct characteristics. Bright luminescent segments were mobile while dark invisible ones were stationary during biasing. TEM analysis of their Burgers vectors indicated that the mobile segments were silicon-core 30° partial dislocations while the immobile segments were carbon-core 30° ones.

Degradation in SiC Bipolar Devices: Sources and Consequences of Electrically Active Dislocations in SiC

Prototype SiC bipolar diodes for 300A/4500V with 3.1V forward voltage prove the SiC power device performance. However, forward voltage degradation prevents industrial application. Electrical statistics are given, and the phenomenon is described by sequencing stacking fault expansion during current conduction. The sources for these faults are identified by electro luminescence to be dissociated dislocations, likely replicated from the substrate. The identification is benchmarked against KOH etch pit patterns and X-ray back reflection topographs. A variety of buffer layers to suppress the propagation of source defects from the substrate showed small improvements.

Dislocation loops formed during the degradation of forward-biased 4H–SiC p-n junctions

Abstract The partial dislocations that border triangle or parallelogram-shaped stacking faults formed during the degradation of p-n diodes fabricated on 4H–SiC wafers were determined by transmission X-ray topography to be dislocation loops of Burgers vector 1/3〈10 1 0〉, the Shockley partial type, consistent with previously reported TEM results. Some were separated from axial screw dislocations also present in the sample, indicating that the axial dislocations were not involved in the loops’ nucleation; while others were seen to have interacted during their growth with the axial screw dislocations, distorting their shapes from those of ideal parallelograms.