Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Helen Fung is active.

Publication


Featured researches published by Helen Fung.


IEEE Transactions on Electron Devices | 2013

Scaling of GaN HEMTs and Schottky Diodes for Submillimeter-Wave MMIC Applications

K. Shinohara; D. Regan; Yan Tang; Andrea Corrion; David F. Brown; Joel C. Wong; John F. Robinson; Helen Fung; A. Schmitz; Thomas C. Oh; S. Kim; Peter S. Chen; Robert G. Nagele; Alexandros D. Margomenos; Miroslav Micovic

In this paper, we report state-of-the-art high frequency performance of GaN-based high electron mobility transistors (HEMTs) and Schottky diodes achieved through innovative device scaling technologies such as vertically scaled enhancement and depletion mode (E/D mode) AlN/GaN/AlGaN double-heterojunction HEMT epitaxial structures, a low-resistance n+-GaN/2DEG ohmic contact regrown by MBE, a manufacturable 20-nm symmetric and asymmetric self-aligned-gate process, and a lateral metal/2DEG Schottky contact. As a result of proportional scaling of intrinsic and parasitic delays, an ultrahigh fT exceeding 450 GHz (with a simultaneous fmax of 440 GHz) and a fmax close to 600 GHz (with a simultaneous fT of 310 GHz) are obtained in deeply scaled GaN HEMTs while maintaining superior Johnson figure of merit. Because of their extremely low on-resistance and high gain at low drain voltages, the devices exhibited excellent noise performance at low power. 501-stage direct-coupled field-effect transistor logic ring oscillator circuits are successfully fabricated with high yield and high uniformity, demonstrating the feasibility of GaN-based E/D-mode integrated circuits with transistors. Furthermore, self-aligned GaN Schottky diodes with a lateral metal/2DEG Schottky contact and a 2DEG/ n+-GaN ohmic contact exhibited RC-limited cutoff frequencies of up to 2.0 THz.


IEEE Electron Device Letters | 2015

Ultrahigh-Speed GaN High-Electron-Mobility Transistors With

Yan Tang; Keisuke Shinohara; D. Regan; Andrea Corrion; David F. Brown; Joel Wong; A. Schmitz; Helen Fung; Samuel Kim; Miroslav Micovic

This letter reports record RF performance of deeply scaled depletion-mode GaN-high-electron-mobility transistors (GaN-HEMTs). Based on double heterojunction AlN/GaN/AlGaN epitaxial structure, fully passivated devices were fabricated by self-aligned-gate technology featuring recessed n+-GaN ohmic contact regrown by molecular beam epitaxy. Record-high fT of 454 GHz and simultaneous fmax of 444 GHz were achieved on a 20-nm gate HEMT with 50-nm-wide gate- source and gate-drain separation. With an OFF-state breakdown voltage of 10 V, the Johnson figure of merit of this device reaches 4.5 THz-V, representing the state-of-the-art performance of GaN transistor technology to-date. Compared with previous E-mode GaN-HEMTs of similar device structure, significantly reduced extrinsic gate capacitance and enhanced average electron velocity are the key reasons for improved frequency characteristic.


international electron devices meeting | 2012

f_{T}/f_{\mathrm {max}}

K. Shinohara; D. Regan; Andrea Corrion; David F. Brown; Yan Tang; Joel Wong; G. Candia; A. Schmitz; Helen Fung; S. Kim; Miroslav Micovic

We report record DC and RF performance obtained in deeply-scaled self-aligned-gate GaN-HEMTs with heavily-doped n<sup>+</sup>-GaN ohmic contacts to two-dimensional electron-gas (2DEG). High density-of-states of three-dimensional (3D) n<sup>+</sup>-GaN source near the gate mitigates “source-starvation,” resulting in a dramatic increase in a maximum drain current (I<sub>dmax</sub>) and a transconductance (g<sub>m</sub>). 20-nm-gate D-mode HEMTs with a 40-nm gate-source (and gate-drain) distance exhibited a record-low R<sub>on</sub> of 0.23 Ω·mm, a record-high I<sub>dmax</sub> of >4 A/mm, and a broad g<sub>m</sub> curve of >1 S/mm over a wide range of I<sub>ds</sub> from 0.5 to 3.5 A/mm. Furthermore, 20-nm-gate E-mode HEMTs with an increased L<sub>sw</sub> of 70 nm demonstrated a simultaneous f<sub>T</sub>/f<sub>max</sub> of 342/518 GHz with an off-state breakdown voltage of 14V.


compound semiconductor integrated circuit symposium | 2014

of 454/444 GHz

Alexandros D. Margomenos; A. Kurdoghlian; Miroslav Micovic; K. Shinohara; David F. Brown; Andrea Corrion; Harris P. Moyer; Shawn D. Burnham; D. Regan; Robert Grabar; C. McGuire; Mike Wetzel; R. Bowen; Peter S. Chen; H. Y. Tai; A. Schmitz; Helen Fung; Andy Fung; D. H. Chow

Highly scaled GaN T-gate technology offers devices with high ft/fMAX, and low minimum noise figure while still maintaining high breakdown voltage and high linearity typical for GaN technology. In this paper we report an E-band GaN power amplifier (PA) with output power (Pout) of 1.3 W at power added efficiency (PAE) of 27% and a 65-110 GHz ultra-wideband low noise amplifier (LNA). We also report the first G-band GaN amplifier capable of producing output power density of 296mW/mm at 180 GHz. All these components were realized with a 40 nm T-gate process (ft= 200 GHz, fMAX= 400 GHz, Vbrk > 40V) which can enable the next generation of transmitter and receiver components that meet or exceed performance reported by competing device technologies while maintaining > 5x higher breakdown voltage, higher linearity, dynamic range and RF survivability.


IEEE Electron Device Letters | 2013

Self-aligned-gate GaN-HEMTs with heavily-doped n + -GaN ohmic contacts to 2DEG

Andrea Corrion; K. Shinohara; D. Regan; Yan Tang; David F. Brown; John F. Robinson; Helen Fung; A. Schmitz; Duc Le; S. Kim; Thomas C. Oh; Miroslav Micovic

Direct-coupled field-effect transistor (FET) logic inverters and 501-stage ring oscillators (ROs) are fabricated using highly scaled GaN heterojunction FET with gate lengths of 20 and 40 nm. A 40-nm gate-length E/D inverter has logic-low and logic-high noise margins of 0.465 and 1.59 V, respectively, and a logic voltage swing of 2.38 V measured at Vdd = 2.5 V. The corresponding 40-nm 501-stage RO frequency and stage delay are 0.067 GHz and 15 ps, whereas the frequency and stage delay of a 20-nm RO are 0.133 GHz and 7.5 ps. The yield of the 20-nm 501-stage RO circuits is 52% across a 3-in diameter wafer. With 1006 transistors, the 501-stage ROs represent the highest level of transistor integration to date for a GaN circuit, whereas the stage delay is the shortest reported for a GaN digital circuit.


IEEE Electron Device Letters | 2016

GaN Technology for E, W and G-Band Applications

J. S. Moon; Robert Grabar; Dave Brown; Ivan Alvarado-Rodriguez; D. Wong; A. Schmitz; Helen Fung; Peter S. Chen; Jongchan Kang; S. Kim; Thomas C. Oh; C. McGuire

We report the state-of-the-art performance of deep-submicrometer gate length dual-gate GaN HEMTs and cascode GaN HEMTs with 10× reduced gate-to-drain feedback capacitance compared with single-gate GaN HEMTs. With 150-nm gate length field-plated gate structures, these GaN HEMTs demonstrated improvement of small-signal gain by 10 dB, compared with single-gate GaN HEMTs. Large-signal load-pull measurements showed peak power-added-efficiency (PAE) of 71%-74% without harmonic tuning at 10 GHz, up to a measured continuous-wave output power level of 2.3-2.5 W. The 74% PAE is very close to a theoretical maximum PAE of 78.5% without harmonic tuning. Compared with single-gate GaN HEMTs, both the dual-gate and cascode GaN HEMTs offer~10% improvement in peak PAE at the output power of 2.3-2.5 W.


IEEE Electron Device Letters | 2017

High-Speed 501-Stage DCFL GaN Ring Oscillator Circuits

Joel Wong; Keisuke Shinohara; Andrea Corrion; David F. Brown; Zenon Carlos; Adam J. Williams; Yan Tang; John F. Robinson; Isaac Khalaf; Helen Fung; A. Schmitz; Thomas C. Oh; Samuel Kim; Steven Chen; Shawn D. Burnham; Alex Margomenos; Miroslav Micovic

In this letter, we discuss a novel asymmetric field plate structure utilizing a slanted field plate (FP) engineered to appropriately distribute the electric field on GaN high-electron mobility transistors (HEMTs) scaled for low-loss, high-speed power switch applications. A uniform electric field distribution achieved with the slant FP enables an optimum device design, where a low-dynamic ON-resistance (Ron,dyn) and high breakdown voltage are obtained simultaneously by minimizing the gate-drain distance. The optimized FP design demonstrated a low Ron,dyn of 2.3 (2.1) Ω-mm at a quiescent drain voltage of 50V in E-mode (D-mode) HEMTs with a breakdown voltage of 138 V (146 V). The corresponding high-frequency performance of E-mode (D-mode) HEMTs of peak fT/fmax = 41/100 GHz (53/100 GHz) yielded a decent Ron,dyn×Qg product in the range of 31.0-34.5 (28.0-33.3) mQ-nC. This new slant FP technology combined with scaled epitaxial structure (for short Lg) and reduced access resistances, using n+ GaN ohmic contacts, greatly enhances performance and design flexibility of high-speed, low-loss, GaN power switch devices.


2016 IEEE Topical Conference on Power Amplifiers for Wireless and Radio Applications (PAWR) | 2016

>70% Power-Added-Efficiency Dual-Gate, Cascode GaN HEMTs Without Harmonic Tuning

Jeong-Sun Moon; Jongchan Kang; Dave Brown; Robert Grabar; D. Wong; Helen Fung; Peter Chan; Dustin Le; C. McGuire

We report on multi-octave (100 MHz - 8 GHz) GaN HEMT nonuniform distributed amplifier (NDPA) with and without linearization in a MMIC architecture for the first time. The NDPAs were fabricated with 0.14-μm field-plate AlGaN/GaN HEMT technology with fT of 58 GHz and breakdown voltage of 90 - 100 V. The NDPAs were built with six sections in a nonuniform distributed amplifier approach. The small signal gain was ~10 dB over the band with saturated CW output power of 33 - 37 dBm at Vdd = 20 V. The PAE was >35% - 30% up to 6 GHz. The linear NDPAs consist of main and gm3 cells, and show a small signal gain of 6 - 9 dB due to input RF signal routing. The Psat was ~35 dBm at Vdd = 20 V. Based on two-tone testing, the linear NDPA shows improved OIP3 of >50 dBm, compared to OIP3 of 42 dBm of the NDPA without linearization. The resulting OIP3/Pdc is 16:1, which is the highest reported amongst GaN-based distributed amplifiers.


international electron devices meeting | 2016

Novel Asymmetric Slant Field Plate Technology for High-Speed Low-Dynamic R on E/D-mode GaN HEMTs

Miroslav Micovic; David F. Brown; D. Regan; Joel Wong; Yan Tang; Florian G. Herrault; Dayward Santos; Shawn D. Burnham; Joe Tai; Eric M. Prophet; Isaac Khalaf; C. McGuire; Hector Bracamontes; Helen Fung; A. Kurdoghlian; A. Schmitz

We provide an overview of key challenges and technical breakthroughs that led to development of highly scaled GaN HEMTs having ft > 400 GHz and fmax > 550 GHz and the corresponding IC process. These highly scaled GaN devices have 5 times higher breakdown voltage than transistors with similar high frequency RF power gain in other semiconductor systems (Si, SiGe, InP, GaAs). We also report performance of the first generation of MMIC power amplifiers (PAs) that utilize these highly scaled devices. The power added efficiency (PAE) of 59% measured at a frequency of 32 GHz, bias of 3 V and output power of 24.3 dBm of the first generation Ka-band MMIC PAs that were built using these highly scaled GaN devices, represent a significant improvement in PAE over values reported for other semiconductor technologies at this frequency band as well as for Ka-band MMICs built in lower frequency GaN nodes. Presented data suggest that highly scaled GaN transistors are excellent candidates for MMIC PAs for next generation 28 GHz, 39 GHz, and higher frequency 5G mobile bands, because they would greatly extend battery lifetime in mobile handsets, due to their superior PAE compared to competing semiconductor technologies.


IEEE Transactions on Terahertz Science and Technology | 2015

Wideband linear distributed GaN HEMT MMIC power amplifier with a record OIP3/Pdc

Jeong-Sun Moon; Hwa-Chang Seo; Baohua Yang; M. Antcliffe; Kyung-Ah Son; D. Wong; A. Schmitz; Helen Fung; Dustin Le; C. McGuire; Jongchan Kang; Hyok J. Song

We report millimeter-wave and sub-terahertz detection using graphene FETs up to 220 GHz at zero-bias to reduce 1/f noise. Detection leveraged the nonlinearity of the channel resistance through resistive field-effect transistor mixing for high-dynamic range. At a 50-Ω load, measured detection responsivity was 70 V/W at 2 GHz to 33 V/W at 110 GHz. The measured noise power of the graphene FETs was ~7.5 ×10-18 V2/Hz at zero-bias. Noise equivalent power at 110 GHz was estimated to be ~80 pW/Hz0.5. A linear dynamic range of > 40 dB was measured, providing 15-20 dB greater linear dynamic range compared to conventional CMOS detectors at the transistor level. The emerging graphene heterostructure diodes offer the RC limited cutoff frequency (fc) of 2.9 THz with the noise equivalent power of ~ 8 pW/Hz0.5 at 200 GHz due to its small junction-capacitance and diode nonlinearity.

Collaboration


Dive into the Helen Fung's collaboration.

Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Researchain Logo
Decentralizing Knowledge