Helena Gleskova

MECHANICS OF ROLLABLE AND FOLDABLE FILM-ON-FOIL ELECTRONICS

The mechanics of film-on-foil devices is presented in the context of thin-film transistors on steel and plastic foils. Provided the substrates are thin, such transistors function well after the foils are rolled to small radii of curvature. When a substrate with a lower elastic modulus is used, smaller radii of curvature can be achieved. Furthermore, when the transistors are placed in the neutral surface by sandwiching between a substrate and an encapsulation layer, even smaller radii of curvature can be attained. Transistor failure clearly shows when externally forced and thermally induced strains add to, or subtract from, each other.

Failure resistance of amorphous silicon transistors under extreme in-plane strain

We have applied strain on thin-film transistors (TFTs) made of hydrogenated amorphous silicon on polyimide foil. In tension, the amorphous layers of the TFT fail by periodic cracks at a strain of ∼0.5%. In compression, the TFTs do not fail when strained by up to 2%, which is the highest value we can set controllably. The amorphous transistor materials can support such large strains because they lack a mechanism for dislocation motion. While the tensile driving force is sufficient to overcome the resistance to crack formation, the compressive failure mechanism of delamination is not activated because of the large delamination length required between transistor layers and polymer substrate.

Electrical response of amorphous silicon thin-film transistors under mechanical strain

We evaluated amorphous silicon thin-film transistors (TFTs) fabricated on polyimide foil under uniaxial compressive or tensile strain. The strain was induced by bending or stretching. The on- current and hence the electron linear mobility μ depend on strain e as μ=μ0(1+26×e), where tensile strain has a positive sign and the strain is parallel to the TFT source-drain current path. Upon the application of compressive or tensile strain the mobility changes “instantly” and under compression then remains constant for up to 40 h. In tension, the TFTs fail mechanically at a strain of about +0.003 but recover if the strain is released “immediately.”

Silicon for thin-film transistors

We are standing at the beginning of the industrialization of flexible thin-film transistor (TFT) backplanes. The two important research directions for the TFTs are (i) processability on flexible substrates and (ii) sufficient field-effect mobilities of electrons and holes to support complementary metal insulator semiconductor operation. The most important group of TFT capable semiconductors are the several modifications of silicon films: amorphous, nanocrystalline and microcrystalline. We summarize their TFT properties and their compatibility with foil substrate materials.

Amorphous silicon thin-film transistors on compliant polyimide foil substrates

Much of the mechanical strain in semiconductor devices can be relieved when they are made on compliant substrates. We demonstrate this strain relief with amorphous silicon thin-film transistors made on 25-/spl mu/m thick polyimide foil, which can be bent to radii of curvature R down to 0.5 mm without substantial change in electrical characteristics.

a-Si:H TFTs Made on Polyimide Foil by PE-CVD at 150°C

We have fabricated high-performance amorphous silicon thin-film transistors (a-Si:H TFTs) on 2 mil. (51 μm) thick polyimide foil substrates. The TFT structure was deposited by r.f.-excited plasma enhanced chemical vapor deposition (PECVD). All TFT layers, including the gate silicon nitride, the undoped, and the n+ amorphous silicon were deposited at a substrate temperature of 150 °C. The transistors have inverted-staggered back-channel etch structure. The TFT off-current is approximately 10-12 A, the on-off current ratio is >107, the threshold voltage is 3.5 V, the sub-threshold slope is approximately 0.5 V/decade, and the linear-regime mobility is approximately 0.5 cm2 V-1 s-1. We compare the mechanical behavior of a thin film on a stiff and on a compliant substrate. The thin film stress can be reduced to one half by changing from a stiff to a compliant substrate. A new equation is developed for the radius of curvature of thin films on compliant substrates.

Stability of amorphous-silicon TFTs deposited on clear plastic substrates at 250/spl deg/C to 280/spl deg/ C

Amorphous-silicon (a-Si) thin-film transistors (TFTs) were fabricated on a free-standing new clear plastic substrate with high glass transition temperature (T/sub g/) of >315/spl deg/ C and low coefficient of thermal expansion of <10 ppm/ /spl deg/ C. Maximum process temperatures on the substrates were 250/spl deg/C and 280/spl deg/C, close to the temperatures used in industrial a-Si TFT production on glass substrates. The first TFTs made at 280/spl deg/C have dc characteristics comparable to TFTs made on glass. The stability of the 250/spl deg/C TFTs on clear plastic is approaching that of TFTs made on glass at 300/spl deg/C-350/spl deg/C. TFT characteristics and stability depend only on process temperature and not on substrate type.

Thin-film transistor circuits on large-area spherical surfaces

We report amorphous silicon (a-Si:H) thin-film transistors (TFTs) fabricated on a planar foil substrate, which is then permanently deformed to a spherical dome, where they are interconnected to inverter circuits. This dome subtends as much as 66° (∼1 sr) with the tensile strain reaching a maximum value of ∼6% on its top. Functional TFTs are obtained if design rules are followed to make stiff TFT islands of limited size on compliant substrates. Photoresist patterns for island interconnects are made on the flat structure, are plastically deformed during the shaping of the dome, and then serve to delineate interconnects deposited after deformation by lift-off. We describe the effect of deformation on the TFTs before and after deformation and the performance of TFT inverter circuits. Our results demonstrate that the concept of stiff circuit islands fabricated on deformable foil substrates is a promising approach to electronics on surfaces with arbitrary shapes.

a-Si:H thin film transistors after very high strain

We fabricate amorphous silicon (a-Si:H) thin-film transistors (TFTs) on a 25 μm Kapton foil, and then bend the foil over mandrels of various radii. The bending causes tensile strain in the TFTs when they face out, and compressive strain when they face in. After bending, we measure the electrical properties of the TFTs. After ∼2% of compressive strain, there is no change in the TFT electrical performance due to bending, namely in the on-current, off-current, source-gate leakage current, mobility and the threshold voltage. In tension, no change in the TFT performance is observed up to the strain of ∼0.5%. For larger tensile strains TFTs fail mechanically by cracking of the TFT layers. These cracks run perpendicularly to the bending direction.

DC-gate-bias stressing of a-Si:H TFTs fabricated at 150/spl deg/C on polyimide foil

We investigated the electrical stability of a-Si:H TFTs with mobilities of /spl sim/0.7 cm/sup 2//Vs fabricated on 51 /spl mu/m thick polyimide foil at 150/spl deg/C. Positive gate voltage V/sub g/ ranging from 20 to 80 V was used in the bias stress experiments conducted at room temperature. The bias stressing caused an increase in threshold voltage and subthreshold slope, and minor decrease in mobility. Annealing in forming gas substantially improved the stability of the TFTs. The threshold voltage shift exhibited a power law time dependence with the exponent /spl gamma/ depending on the gate bias V/sub g/. For V/sub g/=20 V, /spl gamma/=0.45, while for V/sub g/=80 V, /spl gamma/=0.27. The threshold voltage shift also exhibited a power law dependence on V/sub g/ with the exponent /spl beta/ depending slightly on stress duration. /spl beta/=2.1 for t=100 sec and 1.7 for t=5000 s. These values fall into the range experimentally observed for a-Si:H TFTs fabricated at the standard temperatures of 250-350/spl deg/C.