Henrik Lundin

Optimal index-bit allocation for dynamic post-correction of analog-to-digital converters

Signal processing methods for digital post-correction of analog-to-digital converters (ADCs) are considered. ADC errors are in general signal dependent, and in addition, they often exhibit dynamic dependence. A novel dynamic post-correction scheme based on look-up tables is proposed. In order to reduce the table size and, thus, the hardware requirements, bit-masking is introduced. This is to limit the length of the table index by deselecting index bits. At this point, the problem of which bits to use arises. A mathematical analysis tool is derived, enabling the allocation of index bits to be analyzed. This analysis tool is applied in two optimization problems, optimizing the total harmonic distortion and the signal-to-noise and distortion ratio, respectively, of a corrected ADC. The correction scheme and the optimization problems are illustrated and exemplified using experimental ADC data. The results show that the proposed correction scheme improves the performance of the ADC. They also indicate that the allocation of index bits has a significant impact on the ADC performance, motivating the analysis tool. Finally, the optimization results show that performance improvements compared with static look-up table correction can be achieved, even at a comparable table size.

A criterion for optimizing bit-reduced post-correction of AD converters

Dynamic digital post-correction of analog-to-digital converters (ADCs) is considered. A generalized dynamic correction method is proposed and a framework for analyzing the related bit allocation problem is derived. Finally, this framework is employed in an optimization problem. The solution to the problem indicates which ADC output bits to use in order to maximize the signal-to-noise and distortion ratio in a post-correction system with a constraint on memory size. The proposed methods are accompanied by exemplary results obtained using experimental ADC data.

On external calibration of analog-to-digital converters

External calibration and compensation of analog-to-digital converters is considered. Two novel methods are presented. Both methods employ multiple calibration frequencies in order to improve the wide-band performance of the converter. Also, a dynamic table indexing is introduced to further improve the performance. A recursive sine-wave reconstruction filter algorithm is developed for calibration purposes. The proposed methods are evaluated using experimental converter data. Results indicate that the dynamic indexing provides good correction performance, also at frequencies not used during calibration. Thus, wide-band calibration can be achieved.

Bayesian Calibration of a Lookup Table for ADC Error Correction

This paper presents a new method for the correction of nonlinearity errors in analog-to-digital converters (ADCs). The method has been designed to allow a self-calibration in systems where an internal signal can be generated, such as base stations for mobile communications. The method has been implemented and tested in simulation on the behavioral model of commercial ADCs and on a hardware setup composed by a data acquisition board and a distorting circuit

On the Estimation of Quantizer Reconstruction Levels

We consider the problem of estimating the optimal reconstruction levels of a fixed quantizer, such as the amplitude quantization part of an analog-to-digital converter. A probabilistic transfer function model is applied for the quantizer. Two different assumptions are made for the transfer function, and an estimator based on order statistics is applied. The estimator turns out to give better results in terms of mean square error than the commonly applied sample mean. The Cramer-Rao lower bound for the estimation problem is also considered, and simulation results indicate that the derived estimator is asymptotically efficient

Look-Up Tables, Dithering and Volterra Series for ADC Improvements

This chapter gives an introduction and an overview to correction methods for analog-to-digital converters (ADCs), including methods that are implemented using look-up tables, the method known as dithering, and methods that are based on a mathematical model of the ADC.

Implementation of a Smart Antenna Multiuser Algorithm on a DSP-Based Wireless MIMO Test-Bed

This paper describes the implementation and performance of three communication schemes on a DSP-based MIMO test-bed. A multicell scenario with two basestations and two users in the same room is evaluated. Eigenbeamforming with and without interference pre-whitening at both transmitter and receiver is compared with SISO multicell communication. Experimental results show that the gain from using interference pre-whitening is significant. The BER performance of beamforming without intercell interference suppression is only marginally better than single antenna communication. The paper also presents the implementation of synchronization, equalization, frequency offset estimation and decision directed beamforming mismatch compensation

Optimizing dynamic post-correction of AD converters

Dynamic digital post-correction of AD converters is considered. A generalized dynamic correction method is proposed and a framework for analyzing the related bit allocation problem is derived. Finally, this framework is employed in an optimization problem. The solution to the problem indicates which ADC output bits to use in order to maximize the SINAD in a post-correction system with a constraint on memory size. The proposed methods are accompanied by exemplary results obtained using experimental ADC data.

A Bayesian Filtering - Approach for Calibrating a Look-Up Table used for ADC Error Correction

The paper presents a new method for the correction of non-linearity errors in ADCs. The method has been designed to allow self calibration in systems where an internal signal can be generated, such as base stations for mobile communications. The method has been implemented and tested in simulation on the behavioral model of a commercial ADCs, and on a hardware setup composed by a data acquisition board and a distorting circuit