Hervé Grabas

A 15 GSa/s, 1.5 GHz Bandwidth Waveform Digitizing ASIC

The PSEC4 custom integrated circuit was designed for the recording of fast waveforms for use in largearea time-of-ight detector systems. The ASIC has been fabricated using the IBM-8RF 0.13 m CMOS process. On each of 6 analog channels, PSEC4 employs a switched capacitor array (SCA) 256 samples deep, a ramp-compare ADC with 10.5 bits of DC dynamic range, and a serial data readout with the capability of region-of-interest windowing to reduce dead time. The sampling rate can be adjusted between 4 and 15 Gigasamples/second [GSa/s] on all channels and is servo-controlled on-chip with a low-jitter delay-locked loop (DLL). The input signals are passively coupled on-chip with a -3 dB analog bandwidth of 1.5 GHz. The power consumption in quiescent sampling mode is less than 50 mW/chip; at a sustained trigger and readout rate of 50 kHz the chip draws 100 mW. After xed-pattern pedestal subtraction, the uncorrected dierential non-linearity is 0.15% over an 750 mV dynamic range. With a linearity correction, a full 1 V signal voltage range is available. The sampling timebase has a xed-pattern non-linearity with an RMS of

Development of Large Area, Pico-second resolution Photo-Detectors and associated readout electronics

The Large Area Pico-second Photo-detectors described in this contribution incorporate a photo-cathode and a borosilicate glass capillary Micro-Channel Plate (MCP) pair functionalized by atomic layer deposition (ALD) of separate resistive and electron secondary emitters materials. They may be used for biomedical imaging purposes, a remarkable opportunity to apply technologies developed in HEP having the potential to make major advances in the medical world, in particular for Positron Emission Tomography (PET). If daisy-chained and coupled to fast transmission lines read at both ends, they could be implemented in very large dimensions. Initial testing with matched pairs of small glass capillary test has demonstrated gains of the order of 105 to 106. Compared to other fast imaging devices, these photo-detectors are expected to provide timing resolutions in the 10–100ps range, and two-dimension position in the sub-millimeter range. A 6-channel readout ASIC has been designed in 130nm CMOS technology and tested. As a result, fast analog sampling up to 17 GS/s has been obtained, the intrinsic analog bandwidth being presently under evaluation. The digitization in parallel of several cells in two microseconds allows getting off-chip digital data read at a maximum rate of 40 MHz. Digital Signal Processing of the sampled waveforms is expected achieving the timing and space resolutions obtained with digital oscilloscopes.

Position Measurements with Micro-Channel Plates and Transmission lines using Pico-second Timing and Waveform Analysis

The anodes of Micro-Channel Plate devices are coupled to fast transmission lines in order to reduce the number of electronics readout channels, and can provide two-dimension position measurements using two-ends delay timing. Tests with a laser and digital waveform analysis show that resolutions of a few hundreds of microns along the transmission line can be reached taking advantage of a few pico-second timing estimation. This technique is planned to be used in Micro-channel Plate devices integrating the transmission lines as anodes.