Herve Mathias

Low Power Motion Detection with Low Spatial and Temporal Resolution for CMOS Image Sensor

Video surveillance aims at detecting unexpected individuals or objects intrusion. When no motion is observed, common motion detection systems induce huge power consumption, regardless of the scene activity. This paper presents algorithms for low power motion detection, and their possible implementation. The main interest is that they are able to adapt the sensors acuity according to the scene activity. Relevant motion information can be extracted from images with lowered spatial and temporal resolution, with specific algorithms. By reducing the amount of data to analyze and spatial and temporal redundancy, a drastic reduction of power consumption can be achieved.

SystemC validation of a low power analog CMOS image sensor architecture

In a context of embedded steady camera for video surveillance with high performance requirements and hard power consumption constraints, a low power CMOS image sensor architecture allowing sensors acuity adaptation to the scene activity is considered. In this paper we present an original approach based on SystemC modeling to validate a complex analog SIMD architecture (i.e. highly parallel and programmable) and the implemented algorithm.

Three novell analog-domain algorithms for motion detection in video surveillance

As to reduce processing load for video surveillance embedded systems, three low-level motion detection algorithms to be implemented on an analog CMOS image sensor are presented. Allowing on-chip segmentation of moving targets, these algorithms are both robust and compliant to various environments while being power efficient. They feature different trade-offs between detection performance and number of a priori choices. Detailed processing steps are presented for each of these algorithms and a comparative study is proposed with respect to some reference algorithms. Depending on the application, the best algorithm choice is then discussed.

Adaptive Multiresolution for Low Power CMOS Image Sensor

To be implemented on an analog CMOS image sensor, a robust algorithm based on recursive operations is presented. It allows sensors acuity adaptation to the scene activity. The main interest of the presented motion detection with adaptive thresholding is that, in a context of embedded steady camera, such a system allows focusing on targets with high resolution while keeping background in low resolution. Drastic power consumption reduction is achieved by tremendously reducing the amount of processed data.

CMOS reconfigurable readout circuit for a multifunction sensor

In this paper, a CMOS reconfigurable readout circuit is proposed. The proposed circuit, based on a classical dual-slope converter but used in an original way, can offer an extended dynamic range thanks to its configurability proposed in this paper. This originality makes it possible that two physical parameters from a multifunction sensor can be measured with a unique readout circuit.

Improvement of the architecture for MEMS resonator quality factor measurement

In this paper, the performance analysis of our previously proposed architecture for MEMS resonator quality factor measurement is carried out in taking into account the imperfection of each functional block of the architecture. This analysis puts in evidence the impact of the imperfection of each functional block on the measurement precision and predicts the attainable measurement precision of this architecture. In order to improve the performance, an improved architecture is proposed, with which the measurement precision can be improved at least a factor of 2.

A low noise CMOS preamplifier for femtoampere current detection

This paper presents a low noise CMOS preamplifier for femtoampere detection. Based on a classical charge amplifier, a ping-pong technique is proposed to reset the charge amplifier, keeping the preamplifier stable even in a strong parasitic DC current. With a low reset frequency, the undesired folding noise is greatly reduced and the signal-to-noise ratio (SNR) at the output can be kept almost constant. The simulation results show that using the proposed preamplifier, the output SNR can still be 72 for an input current of 200 fA among a parasitic DC current of 100 pA. The dynamic range is observed over 120 dB.

Architecture for a low power image sensor with motion detection based ROI

Visual tasks for embedded systems are confronted with strong constraints on power consumption. Algorithms have to be both robust and compliant to various environments while being computationally and power efficient. An architecture of CMOS image sensor tailored to implement a class of robust motion detection algorithms based on recursive operations, allowing sensors acuity adaptation to the scene activity, is exposed. The main interest is that in a context of embedded steady camera, such a system allows to focus on targets with high resolution while keeping background in low resolution. Drastic power consumption reduction is achieved by tremendously reducing the amount of processed data.

Adaptive thresholding for motion detection in a CMOS image sensor

To be implemented on an analog CMOS image sensor, a robust algorithm based on recursive operations is presented. It allows sensors acuity adaptation to the scene activity. The main interest of the presented motion detection with adaptive thresholding is that, in a context of embedded steady camera, such a system allows focusing on targets with high resolution while keeping background in low resolution. Drastic power consumption reduction is achieved by tremendously reducing the amount of processed data.

Design and analysis of a switched-capacitor-based peak detector

In this paper, a CMOS peak detector is proposed. The proposed peak detection is based on signals slope variation and it can be easily exploited for positive as well as negative peak detection. Besides it can also be used for multiple peak detection without needing resetting operation, making the circuit implementation quite simple. A switched-capacitor-based (SC-based) implementation is given along with performance analysis based on functional as well as analytical model. The developed analysis gives an insight into the potential performance as well as a design guide to reach the desired target. To have a relative error less than 1%, the frequency ratio of sampling signal to input signal should be over 22. The proposed peak detectors operation is confirmed by experimental results from Anadigm FPAA developing board.