Herzl Aharoni

An efficient low voltage, high frequency silicon CMOS light emitting device and electro-optical interface

A silicon light emitting device was designed and realized utilizing a standard 2-/spl mu/m industrial CMOS technology design and processing procedure. The device and its associated driving circuitry were integrated in a CMOS integrated circuit and can interface with a multimode optical fiber. The device delivers 8 nW of optical power (450-850 nm wavelength) per 20-/spl mu/m diameter of chip area at 4.0 V and 5 mA. The device emits light by means of a surface assisted Zener breakdown process that occurs laterally between concentrically arranged highly doped n/sup +/ rings and a p/sup +/ centroid, which are all coplanarly arranged with an optically transparent Si-SiO/sub 2/ interface. Theoretical and experimental determinations with capacitances and series resistances indicate that the device has an intrinsic high-frequency operating capability into the near gigahertz range.

X‐ray photoelectron spectroscopy investigation of ion beam sputtered indium tin oxide films as a function of oxygen pressure during deposition

X‐ray photoelectron spectroscopy analysis was performed on ion beam sputter deposited films of indium tin oxide as a function of O2 partial pressure during deposition. The oxygen partial pressure was varied over the range of 2.5×10−6–4.0×10−5 Torr. Changes in composition as well as in the deconvoluted In 3d5/2, Sn 3d5/2, and O 1s core level spectra were observed and correlated with the variation of the oxygen partial pressure during deposition. Results show that the films become increasingly stoichiometric as PO2 is increased and that the excess oxygen introduced during deposition is bound predominantly to the Sn and has little or no effect on the In–O bonding.

Increased efficiency of silicon light-emitting diodes in a standard 1.2-μm silicon complementary metal oxide semiconductor technology

Scaled versions of a variety of silicon light-emitting diode elements (Si LEDs) have been realized using a standard 1.2-µm, doublepolysilicon, double-metal, n-well CMOS fabrication process. The devices operated with a n+p junction biased in the avalanche breakdown mode and were realized by using standard features of the ORBIT FORESIGHT design rules. The elements emit optical radiation in a broad band in the 450- to 850-nm range. An emitted intensity (radiant exitance) of up to 7.1 µW/cm2 (or about 8 nW per 60-µm-diam chip area) has been obtained with 5 mA of current at an operating voltage of 18.5 V. Excellent uniformity in emission intensity of better than 1% variation was obtained over areas as large as 100x500 µm. A best power conversion efficiency of 8.7x 10-8 and a quantum efficiency of 7.8x 10-7 were measured. All of these values are about one order of magnitude better than previously reported values for Si LED avalanche devices. Coupling between the elements as well as electro-optical coupling between an element and an optical fiber was realized.

Planar light-emitting electro-optical interfaces in standard silicon complementary metal oxide semiconductor integrated circuitry

Lukas Willem SnymanTechnikon PretoriaSchool of Electrical EngineeringDepartment of Electronic EngineeringPrivate Bag X6800001 Pretoria, South AfricaandFrench South African Technical Institute inElectronicsE-mail: lsnyman@techpta.ac.zaHerzl AharoniBen-Gurion University of the NegevDepartment of Electricaland Computer EngineeringBeer-Sheva, 84105IsraelMonuko du PlessisJan F. K. MaraisDeon Van NiekerkUniversity of PretoriaCarl and Emily Fuchs Institute forMicroelectronics (CEFIM)Department of Electrical, Electronicand Computer Engineering0002 Pretoria, South AfricaAlice BiberCentre Suisse d’Electronique et deMicrotechniqueNeuchatel, SwitzerlandAbstract. A number of planar silicon light-emitting devices are designedand realized in standard 1.2 and 2-mm complementary metal oxide semi-conductor (CMOS) integrated circuitry. The devices yield optical powerintensities of up to 0.2 mW/cm

Oxidation of silicon-germanium alloys

Abstract Oxidation of Si/Ge alloys, of up to 37% Ge, were investigated in view of the material utilization for MOS devices. Both single crystals and homogeneous polycrystalline Si/Ge, mainly in [111] direction, were used. The oxide formed after first oxidation was found to be SiO2 only, substantiated by several types of measurements. The Ge piled up at the interface. Higher order oxidations included an increasing amount of Ge. MOS capacitors and transistors were produced and showed higher surface state density and negatively charged oxides.

Thin inter-polyoxide films for flash memories grown at low temperature (400/spl deg/C) by oxygen radicals

Thin polyoxide films grown at 400/spl deg/C on n/sup +/-poly-Si films, used as gate insulators in MOS capacitors, are shown to exhibit superior performance, with respect to conventional, thermally grown polyoxide films at 900/spl deg/C, i.e., they possess lower leakage currents and can sustain higher electrical fields. They are also shown to be superior to, either polyoxide films grown at 980/spl deg/C on substrates treated by chemical mechanical polishing (CMP) or polyoxide films grown by electron cyclotron resonance (ECR) nitrous oxide plasma at 400/spl deg/C. The present film growth techniques utilize oxygen radicals (O*), rather than oxygen molecules (O/sub 2/), which are used in conventional processing. The oxygen radicals are generated by microwave (2.45 GHz) excited high-density plasma of Kr/O/sub 2/ gas mixture.

Silicon LEDs fabricated in standard VLSI technology as components for all silicon monolithic integrated optoelectronic systems

It is shown that, by using conventional VLSI design rules and device processing, a variety of two terminal and multiterminal integrated silicon light-emitting devices (Si-LEDs) can be routinely fabricated without any adaptation to the process, enabling the production of all-silicon monolithic optoelectronic systems. Their specific performance can be tailored by their different geometries and structures, yielding, by design, area, line, and point light-emitting patterns. The light-generating mechanisms are based on carrier quantum transitions in Si pn junctions, operated in the field emission or avalanche modes. Field emission Si-LEDs can operate at supply voltages compatible with those of integrated circuits (5 V or less). Avalanche Si-LEDs require higher operating voltages, but yield higher light intensities. The two terminal Si-LEDs yield a linear relation between the emitted light intensity and the driving current. The multiterminal Si-LEDs exhibit a nonlinear relation between the light emission intensity and the controlling electrical signal, enabling signal processing operations, which can not be attained in two terminal Si-LEDs. Two basic structures of multi terminal Si-LEDs are presented, i.e MOS-like structures, or carrier injection based structures (BJT-like devices). They possess different input impedances and both their emitted light intensities and emitting area patterns can be controlled by the input electrical signal.

A silicon transconductance light emitting device (TRANSLED)

A novel multi-terminal silicon light emitting device (TRANSLED) is described where both the light intensity and spatial light pattern of the device are controlled by an insulated MOS gate voltage. This presents a major advantage over two terminals Si-LEDs, which require direct modulation of the relatively high avalanche current. It is found that, depending on the bias conditions, the light intensity is either a linear or a quadratic function of the applied gate voltage. The nonlinear relationship facilitates new applications such as the mixing of electrical input signals and modulating the optical output signal, which cannot readily be achieved with two terminal Si-LEDs, since they exhibit a linear relationship between diode avalanche current and light intensity. Furthermore, the control gate voltage can also modulate the emission pattern of the light emitting regions, for example, changing the TRANSLED from an optical line source to two point sources.

A dependency of quantum efficiency of silicon CMOS n/sup +/pp/sup +/ LEDs on current density

A dependency of quantum efficiency of nn/sup +/pp/sup +/ silicon complementary metal-oxide-semiconductor integrated light-emitting devices on the current density through the active device areas is demonstrated. It was observed that an increase in current density from 1.6/spl times/10/sup +2/ to 2.2/spl times/10/sup +4/ A/spl middot/cm/sup -2/ through the active regions of silicon n/sup +/pp/sup +/ light-emitting diodes results in an increase in the external quantum efficiency from 1.6/spl times/10/sup -7/ to 5.8/spl times/10/sup -6/ (approximately two orders of magnitude). The light intensity correspondingly increase from 10/sup -6/ to 10/sup -1/ W/spl middot/cm/sup -2//spl middot/mA (approximately five orders of magnitude). In our study, the highest efficiency device operate in the p-n junction reverse bias avalanche mode and utilize current density increase by means of vertical and lateral electrical field confinement at a wedge-shaped n/sup +/ tip placed in a region of lower doping density and opposite highly conductive p/sup +/ regions.

Analysis of n+p silicon junctions with varying substrate doping concentrations made under ultraclean processing technology

Using highly controlled ultraclean processing technology, marked improvements in n+p Si junction quality are achieved presenting a theoretical significance. Boron-doped substrates with various boron doping concentrations Ns were As+ implanted, forming the n+ junction sides. The diffusion (Id) and generation (Igen) currents, as well as the ideality and the generation factors, are significantly reduced, and bulk generation lifetimes are prolonged. Using Shockley–Read–Hall theory it is found that a deviation of the trapping centers energy (Et) from the midband-gap energy (Ei) is responsible for the improvements. The experimental results show that |Et−Ei| is a function of Ns, and that the Igen/Id ratio is significantly low. Accordingly, it is proposed that Igen/Id ratio should be regarded, under certain conditions, as a figure of merit for junction quality. It is concluded that the |Et−Ei| deviation is related to the ultraclean processing technology used, due to the formation of new energy levels far from Ei ...