Hideki Hakuma

Achievement of 19.7% efficiency with a small-sized Cu(InGa)(SeS) 2 solar cells prepared by sulfurization after selenizaion process with Zn-based buffer

We have been focused on improving conversion efficiency of Cu(In, Ga)(Se, S)2 (CIS)-based solar cell with 30×30cm2-sized submodules, and achieved an efficiency of 17.8% up to now[1]. In this report, we will present an achievement of certified 19.7% conversion efficiency with a small-sized single cell (approximately 0.5cm2) extracted from a 30×30cm2-sized substrate prepared by the sputtering followed by sulfurization after selenization (SAS) method with Zn-based buffer layer. As a leading company of CIS-based solar module, we will keep exploring the potential of CIS-based solar cell both on commercial and lab scales.

Achievement of over 17% efficiency with 30×30cm 2 -sized Cu(InGa)(SeS) 2 submodules

17.2 % efficiency on a 30×30cm2-sized Cu(InGa)(SeS)2 (CIS-based) thin-film submodule is achieved. The structure of the submodule is the same as the previously reported one; i.e. monolithically integrated CIS-based cells on a Mo-deposited glass substrate with a Zn(O, S, OH)x buffer and a ZnO window. Current progress is brought by improving uniformity across respective layers and by reducing the optical loss of the ZnO window. For enhanced cost-competitiveness, we are pursuing both research & development and commercial production with unprecedented speed.

Achievement of 17.5% efficiency with 30 × 30cm 2 -sized Cu(In,Ga)(Se,S) 2 submodules

The efficiency of 17.8% on a 30 × 30cm²-sized Cu(In,Ga)(Se,S)₂ (CIS)-based thin-film submodule was achieved. The device structure is same as our previous works; monolithically integrated CIS-based cells on a Mo-deposited glass substrate with a Zn(O, S, OH)_x buffer and a ZnO window. Current Progress was mainly brought by review of the band profile of the absorber layer. More specifically, fine tuning of the grading of Ga/(Ga+In) and S/(Se+S) ratio turned out to improve the value of V_oc × J_sc by a factor of as much as three percent.

Achievement of 16% milestone with 30cm×30cm-sized CIS-based thin-film submodules

The efficiency of 16.03% on a 30cm×30cm-sized Cu(In,Ga)(Se,S)2 (CIS)-based thin-film circuit was achieved by review of its design for absorber layer. Increase in a CIS-based absorber thickness confirms enhancement of short-circuit current density. In this study, we report that it is critical to understand the correlation between the film thickness of the absorber and sulfurization degree to improve the efficiency. It has been found that by optimizing the sulfurization degree as a function of the film thickness of a precursor layer, the carrier concentration and crystal growth are enhanced through an improved diffusion of gallium. From electron-back scattering diffraction maps and electron beam induced current profile analyses, it is confirmed that improvement in the crystallinity of the CIS-based absorber and extension of the space charge region by increased severity of sulfurization degree for thicker precursor layer. These results lead to the progress of improvement in the conversion efficiency.

Change of the Characterization Techniques as Progress of CuInSe2-Based Thin-Film PV Technology

In the CuInSe2(CIS)-based thin-film PV technology, various characterization techniques have been applied to measure the composition, crystal structure, depth profile and defect chemistry and so on, since Boeing Aerospace, for the first time, has come to the 10 % milestone in a thin-film form in 1980 by fabricating a very small single cell with top grids. More advanced and comprehensive characterization techniques are being applied after over 18 % total-area efficiency was consistently achieved employing the “three stage method”, which was developed by National Renewable Energy Laboratory (NREL). Comparing to the CIS-based absorber, there are not so many researches to investigate the absorber/buffer interface because the buffer is too thin to analyse separately and precisely and there are quite limited information on reaction pathways and composition of the buffer layer. However, in order to achieve the aperture-area efficiency of over 18 % on over 800cm2-sized large-area integrated circuits, it is remarkably important how to enhance the quality of absorber/buffer interface. Therefore, analytical works to understand how to improve the FF should tend to be more and more important.

Improvement of the interface quality between Zn (O,S,OH) x buffer and Cu(InGa)(SeS) 2 surface layers to enhance the fill factor over 0.700

For realizing the proof of mass production capablity or a move toward a GW/a production, 16%-efficiency project has been started setting the target of each parameter as V∝: 0.685 V/cell, FF: 0.735 and J sc : 31.8mA/cm 2 . Up to FY2008, the target of each parameter independently has been achieved expect the efficiency. All of our research by adjusting the two resistance (R sh and R s ) in the monolithically integrated 30cm×30cm-sized circuits. To improve the FF, double buffer structure with CBD-Zn(O,S,OH) x and MOCVD-ZnO is proposed and the thickness is adjusted by optimizing the R s and the R sh . As the result, FF of over 0.7 has been achieved for the first time in our CIS R&D since FY 1993.