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Featured researches published by Hideto Takano.


signal processing systems | 1995

A single-chip MPEG/audio decoder LSI based on a compact decoding algorithm

Masahiro Iwadare; Hideto Takano; Yoshitaka Shibuya; Hideki Sakamoto; Takeshi Kuwajima; Osamu Kitabatake; Naoko Kobayashi

A single-chip decoder LSI is developed for ISO/IEC MPEG (the International Organisation for Standardisation/the International Electrotechnical Commission, Moving Pictures Expert Group) audio. The applicable layers are Layer I and II of MPEG-1 and MPEG-2/Lower-Sampling-Frequency Mode. A fast calculation algorithm, which is also effective for on-chip memory reduction, is incorporated in audio signal synthesis. The reliability in bitstream synchronization is improved by including bitstream inconsistency detection. Bitstream error concealment by repeating previous audio data is supported. The decoding delay is adjustable when an optional external memory is connected to the LSI.


IEEE Transactions on Consumer Electronics | 1997

A new implementation of the Silicon Audio Player based on an MPEG/audio decoder LSI

Akihiko Sugiyama; Masahiro Iwadare; Takashi Manabe; Nobuhiro Ohdate; Hideto Takano; Osamu Kitabatake; Eiji Hirao

A new implementation of the Silicon Audio player is presented. It decodes data which has been encoded by the MPEG/Audio Layer II algorithm standardized by the ISO (International Standardization Organization). The encoded data is stored in a semiconductor memory card. Decoding is carried out by an MPEG/audio decoder chip. Thanks to this dedicated LSI chip, the power consumption of the player is reduced so that the player could be driven by four nickel-metal hydride batteries for four and a half hours. Since the Silicon Audio player has no mechanical movement, it is robust against vibration that has been a serious problem for portable audio players. The recording time is defined as a function of the memory-card capacity and the compression ratio. Assuming one eighth compression with a sampling rate of 48 kHz, a 24-minute recording is possible with a 32-Mbyte memory card.


IEEE Transactions on Consumer Electronics | 1995

The Silicon Audio an audio-data compression and storage system with a semiconductor memory card

Akihiko Sugiyama; Masahiro Iwadare; Nobuhiro Ohdate; Takashi Manabe; Hideto Takano; Osamu Kitabatake; Eiji Hirao

A new audio-data compression and storage system, the Silicon Audio, is presented. It employs the MPEG/Audio Layer II algorithm for data compression, which has been standardized by ISO (International Standardization Organization). A semiconductor memory card is equipped with to store the compressed signal. Decoding is carried out by a general purpose digital signal processor and a specially designed gate array chip. The package includes some special designs with vivid colors for the outdoor and sporting use. Since it has no mechanical movement, it is robust against vibration that has been a serious problem for portable audio players. The recording time is defined as a function of the memory-card capacity and the compression ratio. >


Journal of the Acoustical Society of America | 1999

Speech signal processing circuit and method for decoding a coded speech signal by controlling operation of a band synthesis filter

Hideto Takano; Yoshitaka Shibuya

A speech signal processing circuit includes an input buffer for receiving inverse quantization samples and for temporarily storing those samples. The circuit also includes a band synthesis filter for reading the inverse quantization samples stored in the input buffer one by one, and for conducting quadrature conversion processing and sum-of-product operation processing to decode the samples into speech signals. The circuit further includes a control circuit for controlling operation of the band synthesis filter. When the inverse quantization samples are recognized as being stored in the input buffer, the control circuit controls the band synthesis filter to execute, as an initial operation, the quadrature conversion processing of the inverse quantization samples as many times as a number corresponding to an operation delay time of the band synthesis filter. After completion of the initial operation, the control circuit control the band synthesis filter to continue, as a steady operation, the quadrature conversion processing of the inverse quantization samples stored in the input buffer, as well as to conduct the sum-of-product operation processing with respect to the results of the quadrature conversion processing.


Archive | 1995

Frequency subband encoding apparatus

Hideto Takano


Archive | 1993

Hardware arrangement for fast fourier transform having improved addressing techniques

Hideto Takano


Archive | 1997

Assign of pels of a macroblock for compression encoding to a memory sequence in one of banks of DRAM

Hideto Takano


Archive | 1997

Digital audio signal processor having small input buffer

Hideto Takano


Archive | 1996

Synchronizing circuit for use in a digital audio signal compressingxpanding system

Hideto Takano


Archive | 1995

Audio signal processing circuit and video/audio decoder

Hideto Takano; Hideki Sakamoto

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