Hidetoshi Furukawa
Panasonic
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Publication
Featured researches published by Hidetoshi Furukawa.
IEEE Transactions on Electron Devices | 1997
Tsuyoshi Tanaka; Hidetoshi Furukawa; Hiroshi Takenaka; Tetsuzo Ueda; Takeshi Fukui; Daisuke Ueda
A GaAs power FET with a spike-gate has been developed for high-efficiency operation under extremely low supply voltage less than 1.5 V. The spike-gate provides both low on-resistance of 2.2 /spl Omega//mm and high transconductance of 180 mS/mm without reducing the output impedance or increasing the gate resistance. The implemented device achieved an output power of 31.5 dBm with 70% power-added efficiency at a frequency of 900 MHz. It should be noted that the present device kept PAE of 60% even at a bias of 0.5 V, which is the lowest voltage ever attained.
MRS Proceedings | 1999
Tsuyoshi Tanaka; Hidetoshi Furukawa; Kazuo Miyatsuji; Daisuke Ueda
The surface passivation of GaAs power FET has been investigated. Intermodulation distortion of GaAs power FET was found to be affected by frequency dispersion which originates from electron trap at the surface in the vicinity of the gate. There are two ways to suppress the frequency dispersion. One is reducing electron trap itself by using surface passivation, the other is making surface insensitive to the surface trapping effect. We found the FET with undoped InGaP layers on the n-GaAs channel is free from surface trapping effects. The undoped InGaP layer acts as an ideal passivation layer for the channel, since it shows only 2% frequency dispersion of drain current at 1MHz compared to DC condition.
Solid-state Electronics | 1997
Hidetoshi Furukawa; Tsuyoshi Tanaka; Hiroshi Takenaka; Tetsuzo Ueda; Takeshi Fukui; Daisuke Ueda
Abstract A GaAs power FET employing a spike-gate structure was developed for the high efficiency and low distortion operation under the extremely low supply voltage of 1.5 V. This spike-gate FET is featured by an unique gate structure that has almost zero effective gate length. The spike-gate provides both the low on-resistance of 2.2Ω mm −1 and the low drain conductance of 5 mS mm −1 . Maximum frequency of oscillation ( f max ) is over 30 GHz that is estimated from S-parameter under the supply voltage of 1.5 V. The decrease of the f max is smaller for the spike-ate FET than for the conventional one as the decrease of supply voltage. In π/4-shift QPSK modulation system, the implemented device achieved the output power of 31.0 dBM with 52% power-added efficiency and −51 dBc adjacent channel leakage power at the frequency of 925 MHz under the drain supply voltage of 1.5 V.
IEEE Transactions on Microwave Theory and Techniques | 2000
Hidetoshi Ishida; Kazuo Miyatsuji; Tsuyoshi Tanaka; Hiroshi Takenaka; Hidetoshi Furukawa; Mitsuru Nishitsuji; Akiyoshi Tamura; Daisuke Ueda
We have developed a wide-band amplifier that can keep a gain over 10 dB at an operation current of 10 mA from 100 MHz to 3 GHz. The fabricated integrated circuit (IC) achieved a high-output third-order intercept point of 30 dBm and low noise figure of 1.6 dB at 800 MHz, respectively. The present IC employs a MODFET with 0.2-/spl mu/m gate fabricated by using a phase-shift lithography technique.
Archive | 1996
Hidetoshi Furukawa; Daisuke Ueda
Archive | 1998
Hidetoshi Furukawa; Atsushi Noma; Tsuyoshi Tanaka; Hidetoshi Ishida; Daisuke Ueda
Archive | 1999
Takeshi Fukuda; Hiroshi Takenaka; Hidetoshi Furukawa; Takeshi Fukui; Daisuke Ueda
Archive | 1998
Hidetoshi Furukawa; Atsushi Noma; Tsuyoshi Tanaka; Hidetoshi Ishida; Daisuke Ueda
Archive | 2006
Toshiya Fukuhisa; Masaya Mannoh; Hidetoshi Furukawa
Archive | 1999
Yukio Iwasaki; Hidetoshi Furukawa; Tsuyoshi Tanaka; Daisuke Ueda