Hing-Kit Kwan

Global optimization of common subexpressions for multiplierless synthesis of multiple constant multiplications

In the context of multiple constant multiplication (MCM) design, we propose a novel common subexpression elimination (CSE) algorithm that models the optimal synthesis of coefficients into a 0-1 mixed-integer linear programming (MILP) problem. A time delay constraint is included for synthesis. We also propose coefficient decompositions that combine all minimal signed digit (MSD) representations and the shifted sum (difference) of coefficients. In the examples we demonstrate, the proposed solution space further reduces the number of adders/subtractors in the MCM synthesis.

Design of hybrid continuous-time discrete-time delta-sigma modulators

Recent attention has been drawn to the hybrid Delta-Sigma (DeltaSigma) structure featuring the integration of continuous-time (CT) and discrete-time (DT) structures in the loop filter. It combines the accurate loop filter characteristic of a DT DeltaSigma modulator and the inherent anti-aliasing of a CT DeltaSigma modulator. We present a design methodology for building a CT-DT DeltaSigma modulator via the transformation from a DT DeltaSigma modulator prototype. We also demonstrate the tradeoff of applying this structure to cascaded Delta-Sigma modulators compared to pure CT or DT implementations.

Processor frequency assignment in three-dimensional MPSoCs under thermal constraints by polynomial programming

The operating frequency and the number of cores and active layers in multi-processor systems-on-chips (MPSoC) continue to increase, resulting in rising power density and operating temperature on the die. The increasing temperature reduces the system reliability and performance and increases the cooling cost. Most traditional MPSoC thermal optimization tools are based on two-dimensional planar IC thermal modeling, which is insufficient to capture the different thermal characteristics of three-dimensional (3D) MPSoCs and the behavior subjected to dynamic voltage and frequency scaling (DVFS). The recently proposed 3D optimization approach still ignores the mutual thermal impact between cores in the same layer, which reduces the precision of frequency assignment and may cause violation in the maximum temperature constraint. In this paper, we propose an approach based on polynomial programming that addresses the problem of processor frequency assignment in 3D MPSoC system, such that the total system performance can be maximized as well as the temperature and power constraints are met for all time instances. We also compare the performance improvement of DVFS in 3D MPSoC with that in 2D MPSoC, studying the importance of intra-layer temperature correlation in 3D MPSoC.

Efficient linear macromodeling via least-squares response approximation

We present a least-squares (LS) algorithm for rational function macromodeling of port-to-port responses with discrete-time sampled data. The core routine involves over-determined equations and Altering operation, and avoids numerical-sensitive calculation and initial pole assignment. We demonstrate the fast computation and excellent accuracy and robustness, even with noisy data, in stable response approximation.

Optimal common sub-expression elimination algorithm of multiple constant multiplications with a logic depth constraint

In the context of multiple constant multiplication (MCM) design, we propose a novel common sub-expression elimination (CSE) algorithm that models the optimal synthesis of coefficients into a 0-1 mixed-integer linear programming (MILP) problem with a user-defined generic logic depth constraint. We also propose an efficient solution space, which combines all minimal signed digit (MSD) representations and the shifted sum (difference) of coefficients. In the examples we demonstrate, the combination of the proposed algorithm and solution space gives a better solution comparing to existing algorithms.

Designing Globally Optimal Delta-Sigma Modulator Topologies via Signomial Programming

We present design methodologies for globally optimizing the topologies of delta-sigma modulators. The design task is cast into a generally nonconvex signomial programming problem. Convexification strategies are presented for transforming the nonconvex signomial programming problems into their equivalent convex counterparts, thereby enabling the solution of globally optimal design parameters. Numerical examples verify the effectiveness and superiority of the proposed approach over conventional nonlinear programming techniques.

Efficient Design of Arbitrary Complex Response Continuous-Time IIR Filter

A continuous-time system identification technique, Vector Fitting (VF), is extended from symmetric functions, to asymmetrical cases and is used for complex infinite-impulse-response (IIR) continuous-time filter design. VF involves a two-step pole refinement process based on a linear least-squares solve and an eigenvalue problem. The proposed algorithm has lower complexity than conventional schemes by designing complex continuous-time filters directly. Numerical examples demonstrate that VF achieves highly efficient and accurate approximation to arbitrary asymmetric complex filter responses. The promising results can be realized for high dynamic frequency range networks. Robustness stability margin has also proposed for filter implementation robustness.

Synthesis of optimal OTA-C filter structures with arbitrary transmission zeros via MINLP

We present a design methodology for the globally optimal synthesis of multiple loop feedback operational transconductance amplifier-capacitor (OTA-C) filters. Transmission zero realization via input distribution of OTA network is adopted. A generic topology of OTA-C filter is optimized using a two-stage mixed integer nonlinear programming (MINLP), with circuit complexity and circuit sensitivity as the objective functions. A numerical example shows the efficacy of the proposed approach.

Design and optimization of highly linear CMOS low noise amplifiers via geometric programming

Linearity is an important measurement for the performance of a CMOS low noise amplifier (LNA). The high computational cost required in the linearity simulation, however, constitutes a major bottleneck in the design verification stage. In this paper, we develop a novel and systematic geometric programming (GP)-based approach for the optimized design of a highly linear CMOS LNA, subject to the minimization of the noise factor. Experiments confirm the remarkable efficacy and accuracy of the proposed design flow against traditional simulators.