Hiroaki Fujimoto

LED array modules by new technology microbump bonding method

An LED array module was developed by using the microbump bonding method by which the electrodes of LSI chips and circuit substrate are press-bonded by utilizing the shrinkage stress produced in a light setting insulating resin. The LED array module has a resolution of 400 DPI, and is constructed by face-down mounting of 54 each of the LED chips and driver LSIs on a glass substrate. These LED chips, having an electrode pitch of 63.5 mu m, are disposed on the glass substrate at a pitch of 10 mu m. A dedicated bonder was developed for this assembling work. A report on the LED array module assembling process and the construction of a bonder is presented. >

New solderless connection technology using light-setting insulation resin

A new solderless connection technology using light-setting insulation resin has been developed. This makes possible fine-pitch and short length connection between the FPC (Flexible Printed Circuit) and the electrodes of an electronic device. An FPC is attached by the adhesive force of the light-setting insulation resin. This technology has been applied to a thin-film magnetic head, and realized ultra fine connection, i.e. a connection pitch of 75 /spl mu/m (present ratio 1/2) and a connection length of 250 /spl mu/m (present ratio 1/10).<<ETX>>

Innovative ultra fine line ceramic substrate for semiconductor package

Recently as represented by smart phones and high-speed graphic processing, data processing late is becoming more faster and band width is increasing rapidly. As a result, the clock speed of logic LSI and the bit rate of memory IC are becoming faster and faster. Additionally, the frequency of wireless communication is becoming higher, from GHz to several decimal GHz. The Semiconductor for these applications is required not only to be fast and low power internally, b ut also required to be lo we r signal loss at and higher thermal conductivity as the package. However semiconductor package with organic substrate which is commonly used, has fundamental issues of higher loss at GHz range, lower thermal conductivity, lower reliability by nature characteristic of organic substrate. So it is commonly known that organic substrate is difficult to meet with required specification of the next generation semiconductor. Meanwhile, ceramic substrate is known that the lower loss at GHz band, higher thermal conductivity and higher reliability by the nature characteristic of inorganic materials. and these characteristics are very suitable for next generation semiconductor. But regarding the signal line density of ceramic substrate, conductive patterns are made by old printing method by using metal mask and conductive paste. Thus it is difficult to make fine lines for narrow pitch LSI p ads. So currently, ceramic substrate package is used only for high-end semiconductor, such as high frequency, high power and high reliability application. In order to utilize excellent characteristic of ceramic substrate for semiconductor package, we are developing new patterning method by innovative approach. This method can make breakthrough conventional printing method completely and increase the density of signal lines dramatically. In this paper, we describe the process of this new method and discuss the results of transmission line simulation.