Hirofumi Shimizu

Excellence of Gate Oxide Integrity in Metal-Oxide-Semiconductor Large-Scale-Integrated Circuits Based on P-/P- Thin-Film Epitaxial Silicon Wafers

The substitution of Czochralski (CZ)-silicon (Si) wafers into p-(n-)/p-(n-) ( p- or n- layer on p- or n- Si substrate: resistivity of approximately 100 m Ω m) thin-film epitaxial Si wafers used as starting materials has been investigated with respect to application to metal-oxide-semiconductor (MOS) large-scale-integrated circuits (LSIs). The optimum epitaxial layer ( p-/p- structure) thickness for MOS-LSIs was determined to be approximately 1 µ m from the viewpoints of gate oxide integrity (GOI) improvement and cost effectiveness. With increasing epitaxial layer thickness from 0.1 to 0.3 µ m, the oxide defect density was greatly reduced and leveled off at approximately 1/30 that of a CZ-Si layer if the layer thickness is above 0.3 µ m. This is because microdefects in CZ-Si represented by crystal originated particles (COP) which cause weak spots in the gate oxide layer are covered by an excellent Si epitaxial layer on the CZ-Si surface. The p-/p- thin epitaxial structure results in very controlled resistivity for electrically active regions in the device, resulting in a lower cost of growth.

Warpage of Czochralski-Grown Silicon Wafers as Affected by Oxygen Precipitation

The warpage of Czochralski-grown silicon wafers was investigated in relation to oxygen precipitation caused by simulated heat-treatments at 1000°C and LSI processing, using specimens cut from measured positions along the crystal length. The warpage of the wafers due to simulated thermal stresses increases with the concentration of precipitated oxygen atoms associated with the formation of SiO2 precipitates observed in infrared spectra at around 1224 cm-1, reaching a maximum in the seed-end and a minimum in the tail-end wafers. LSI processing experiments showed that the microdefect density resulting from the nuclei in as-grown ingots must be equal to or lower than 5×109 cm-3 to reduce the warpage and improve the chip yield of devices, even if the microdefect density in the bulk is increased to aim at the intrinsic gettering effect.

Material Microcharacterization of Sol–Gel Derived HfO2 Thin Films on Silicon Wafers

Upon sintering a sol–gel derived HfO2 film at 700°C, on the basis of high-resolution transmission electron microscope measurement combined with electron beam nanodiffraction, the HfO2 film was found to be crystallized in a monoclinic fcc (face centered cubic) structure. The measured interplanar spacing of the crystalline HfO2 on the (111) plane was determined to be 0.314 nm, which was close to the spacing of Si (111) planes, implying the possibility of the epitaxial growth of HfO2 films on Si (111).

Pack-extraction method combined with inductively coupled plasma mass spectroscopy to monitor metal contaminants on surfaces of silicon wafers

A method to extract micro-contaminants detrimental to silicon (Si) devices is developed and its impact on clean technology is discussed, focusing on upgrading the oxide film performance of densely packed devices. Detrimental metal impurities (Fe, Cu, Al, Ni and Zn) on surfaces of Si wafers from three vendors were successfully extracted with a prototype pack-extraction method (PEM), in which sample wafers were individually enclosed in a cleaned Teflon bag containing an aqueous acid solution. Each solution, which contained extracted contaminants, was then analysed with inductively coupled plasma mass spectroscopy (ICP-MS). The results could help reduce undesirable impurities that degrade device characteristics. To analyse impurities on surfaces and in the Si bulk separately, we developed an improved PEM, in which impurities were extracted by successively heating the wafer with three different acid solutions ((i) HCl/H2O, (ii) HF/H2O and (iii) HF/HNO3/H2O). By using this improved PEM combined with ICP-MS, we analysed the impurities on the oxide surfaces, in the oxide and in Si bulk separately (including the SiO2-Si interface) for oxidized wafers contaminated intentionally with impurities of Fe, Al, and Cu prior to oxidation. The analysis showed that Al and Fe mainly segregated at the uppermost layer of the oxide, whereas Cu was distributed not in the oxide, but mainly in the Si bulk and SiO2-Si interface.

Characterization of Sol-Gel Derived and Crystallized ZrO2 Thin Films

Sol–gel-derived zirconium dioxide (ZrO2) films on silicon (Si) substrates fired in air at 350 and 450 °C, using Zr(OH)4 sol based on formic acid (HCOOH) solution, are amorphous and approximately 9–10 nm thick. Crystallization occurs at first at 550 °C as amorphous/tetragonal (011), and finally, at 700 °C, the ZrO2 film crystallizes into tetragonal (011)/monoclinic (111) and (111) structures. The temperature-programmed desorption curve is separated into five distinct H2O desorption components caused by physisorbed H2O, chemisorbed OH, and Zr–OH bonds in the ZrO2 film, and a model is proposed to explain the mechanism of H2O desorption. Thus, H2O desorption and crystallization processes in the ZrO2 film are clarified: consequently the relationships between the film packing density and electrical characteristics are optimized. On the basis of capacitance–voltage characteristics, the dielectric constant (relative permittivity; eZrO2 ) of the sol–gel-derived ZrO2 film fired at 550 °C was calculated to be 12, which is much higher than that of silicon dioxide (SiO2; 3.9).

Observation of ring-distributed microdefects in Czochralski-grown silicon wafers with a scanning photon microscope and its diagnostic application to device processing

A scanning photon microscope (SPM) based on ac surface photovoltage imaging is applied to observe oxygen-related microdefects which are distributed in a ring in oxidized Czochralski-grown silicon wafers, and morphological and microstructural characteristics of the microdefects are then analyzed. The overall distribution of the ring-shaped region revealed by the SPM correspond well to that observed with X-ray topography. The SPM is able to differentiate deteriorated regions as different image contrasts, where stacking faults or oxide precipitates accompanying punched-out dislocation loops exist.

Behavior of Metal-Induced Negative Oxide Charges on the Surface of N-type Silicon Wafers Using Frequency-Dependent AC Surface Photovoltage Measurements

The metal-induced negative charge on the surface of n-type silicon (Si) wafers, previously reported in the atomic bridging model as (AlOSi)- and (FeOSi)- networks, was investigated using AC surface photovoltage (SPV) as a function of the frequency ( f) of a chopped photon beam, with the aid of an AC SPV instrument developed in-house. A frequency-dependent AC SPV in Al-contaminated wafers was observed immediately after the rinsing. In the early stages of exposure to air at room temperature after rinsing, the induced AC SPV at frequencies of less than approximately 100 Hz was flat with frequency. This indicated that majority carrier conduction was the dominant mechanism, suggesting that the surface was depleted and/or weakly inverted. With the passage of time, the AC SPV in the lower frequency region increased, yielding an AC SPV vs frequency relationship approaching 1/ f. This demonstrated that the Al-induced negative charge [(AlOSi)-] increased and finally became limited by the depletion layer capacitance (strongly inverted state). The frequency-dependent AC SPV caused by Fe-induced negative charge [(FeOSi)-] was identified as being dependent on Fe concentration on the Si surface. The higher the Fe concentration, the more strongly inverted the Si surface became. The metal-induced oxide charge could be observed, together with other oxide charges such as fixed oxide charge.

A Defect Control Technique for the Intrinsic Gettering in Silicon Device Processing

A short period low-temperature-annealing procedure is proposed for the two step annealing process to make effective intrinsic gettering in silicon device processing. A continuous raising of annealing temperature at a constant rate during the low temperature annealing step increases the density of bulk microdefects which are able to grow further in the subsequent high temperature device processing step. The temperature raising rate is limited so that the expanding speed of the critical size of microdefects at the annealing temperature is lower than the growth rate of microdefects. The optimum defect density is discussed from the standpoint of wafer warpage and gettering ability.

Temperature-Programmed Desorption Analyses of Sol–Gel Deposited and Crystallized HfO2 Films

Characterizations of sol–gel-derived hafnium dioxide (HfO2) films on silicon (Si) substrates were carried out using X-ray photoelectron spectroscopy (XPS), and temperature-programmed desorption (TPD). Significant water (H2O) desorption and accompanying structural changes in the HfO2 film were observed from the TPD curves. The HfO2 film exhibited two distinct H2O desorption states. One state was due to the desorption of physisorbed H2O and/or chemisorbed Hf–OH saturated in air at the surface area of the HfO2 film. The other state depicted by major peaks was caused by the desorption of H2O which may be produced by the reaction of Hf–OH bonds and/or tightly locked in the micropores between crystal grains in the crystallized bulk HfO2 film (monoclinic crystalline state). For amorphous HfO2 film fired at 450 °C, the major peak of the TPD curve was symmetrical, indicating that H2O was detected as a result of the reaction of Hf–OH bonds, which is reaction-controlled (the second-order reaction), whereas at 550 and 700 °C (monoclinic), the major peak of the TPD curve was nonsymmetrical (diffusion-controlled; the first-order reaction). On the basis of the capacitance–voltage (C–V) characteristics, the dielectric constant (permittivity eHfO2 ) of the sol–gel-derived HfO2 film was calculated to be 19, which compares well to those reported for HfO2 prepared by chemical vapor deposition (CVD) and physical vapor deposition (PVD).

Thermal Warpage of Large Diameter Czochralski-Grown Silicon Wafers

Thermal warping of large diameter Czochralski-grown silicon wafers as affected by oxygen precipitation is investigated both experimentally and theoretically. The difference of wafer warpage and its shape between the heating and cooling processes is clarified by thermal stresses calculated from temperature gradients in wafers for each process. The critical temperatures for the slip occurrence are determined for the heating and cooling processes as a function of the microdefect density. Then, the optimized process conditions to avoid slip dislocations are obtained experimentally. The critical stress curve for the processed wafers in MOS devices is determined by comparison with the thermal stress curves calculated under various process conditions, and thereby predicting the slip-free conditions for wafers in a row with various diameters from 100 to 200 mm.