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Dive into the research topics where Hiroki Ohsawa is active.

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Featured researches published by Hiroki Ohsawa.


Japanese Journal of Applied Physics | 2017

Self-aligned metal double-gate junctionless p-channel low-temperature polycrystalline-germanium thin-film transistor with thin germanium film on glass substrate

Akito Hara; Yuya Nishimura; Hiroki Ohsawa

Low-temperature (LT) polycrystalline-germanium (poly-Ge) thin-film transistors (TFTs) are viable contenders for use in the backplanes of flat-panel displays and in systems-on-glass because of their superior electrical properties compared with silicon and oxide semiconductors. However, LT poly-Ge shows strong p-type characteristics. Therefore, it is not easy to reduce the leakage current using a single-gate structure such as a top-gate or bottom-gate structure. In this study, self-aligned planar metal double-gate p-channel junctionless LT poly-Ge TFTs are fabricated on a glass substrate using a 15-nm-thick solid-phase crystallized poly-Ge film and aluminum-induced lateral metallization source–drain regions (Al-LM-SD). A nominal field-effect mobility of 19 cm2 V−1 s−1 and an on/off ratio of 2 × 103 were obtained by optimizing the Al-LM-SD on a glass substrate through a simple, inexpensive LT process.


international workshop on active matrix flatpanel displays and devices | 2016

Evaluation of pH sensors using self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors on glass substrate

Hiroki Ohsawa; Hitoshi Suzuki; Satoko Kuwano; Akito Hara

This study presents an evaluation of pH sensors using self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors (TFTs) on a glass substrate. The voltage variation due to a change in pH is read as the variation in threshold voltage of the TFTs by connecting a TFT control gate to a glass electrode. Our experimental results confirm that these TFTs can be successfully used as pH sensors.


international workshop on active matrix flatpanel displays and devices | 2016

Self-aligned metal double-gate junctionless p-channel low-temperature polycrystalline-germanium thin-film transistors with a thin germanium channel on a glass substrate

Akito Hara; Yuya Nishimura; Hiroki Ohsawa

Polyaystalline-germanium (poly-Ge) thin-film transistors (TFTs) are good candidates for next-generation TFTs for use in the backplane of flat-panel displays (FPDs). This is due to their superior electrical properties compared to those of Si and oxide semiconductors. However, poly-Ge shows a strong p-type characteristic; thus, it is not easy to reduce the leakage current using a single-gate (SG) structure. In this study, self-aligned metal double-gate (MeDG) junctionless (JL) p-channel (p-ch) low-temperature (LT) poly-Ge TFTs were fabricated on a glass substrate using a 15-nm-thick solid phase crystallized (SPC) poly-Ge film. Additionally, SG JL p-ch LT poly-Ge TFTs with 15-nm-thick SPC poly-Ge films were fabricated as reference TFTs. The self-aligned MeDG JL p-ch LT poly-Ge TFT shows superior performance compared to that of SG JL p-ch LT poly-Ge TFT.


international workshop on active matrix flatpanel displays and devices | 2015

Controllability of self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors on glass substrate

Hiroki Ohsawa; Shun Sasaki; Akito Hara

Self-aligned four-terminal n-channel (n-ch) and p-channel (p-ch) planar embedded metal double-gate polycrystalline-silicon thin-film transistors (TFTs) were fabricated on a glass substrate at a low temperature of 550 °C. This device includes a metal top gate (TG) and a metal bottom gate (BG), which are used as the drive and control gates, or vice versa. The BG was embedded in a glass substrate, and a poly-Si channel with large lateral grains was fabricated using continuous-wave laser lateral crystallization. The threshold voltage modulations under various control gate voltages (γ = ΔVth/ΔVCG) were nearly equal to the theoretical predictions in both the n-ch and p-ch TFTs. By using this high controllability, an E/D inverter was fabricated, and successful operation at Vdd = 2.0 V was confirmed.


Japanese Journal of Applied Physics | 2016

Controllability of self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors on a glass substrate

Hiroki Ohsawa; Shun Sasaki; Akito Hara


Japanese Journal of Applied Physics | 2018

Performance of four-terminal low-temperature polycrystalline-silicon thin-film transistors and their application in CMOS inverters on glass substrates

Hiroki Ohsawa; Hiroki Utsumi; Akito Hara


international workshop on active matrix flatpanel displays and devices | 2017

Four-terminal polycrystalline-germanium thin-film transistors fabricated at 300°C by metal induced crystallization using copper on a glass substrate

Hiroki Utsumi; Hiroki Ohsawa; Akito Hara


international workshop on active matrix flatpanel displays and devices | 2017

Performance of four-terminal low-temperature polycrystalline-silicon thin-film transistors and their application to CMOS inverter on a glass substrate

Hiroki Ohsawa; Hiroki Utsumi; Akito Hara


The Japan Society of Applied Physics | 2017

CMOS Inverter on Glass Substrate using V th Control of Self-Aligned Four-Terminal Planar Metal Double-Gate Low-Temperature Poly- Si TFTs

Hiroki Ohsawa; Akito Hara


The Japan Society of Applied Physics | 2017

Self-Aligned Planar Metal Double-Gate Cu-MIC Poly-Ge TFTs Fabricated at 300℃ on Glass Substrate

Hiroki Utsumi; Taisei Sasaki; Shunya Sekiguchi; Shoya Takeuchi; Hiroki Ohsawa; Akito Hara

Collaboration


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Akito Hara

Tohoku Gakuin University

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Hiroki Utsumi

Tohoku Gakuin University

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Shun Sasaki

Tohoku Gakuin University

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Yuya Nishimura

Tohoku Gakuin University

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Hitoshi Suzuki

Tohoku Gakuin University

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Satoko Kuwano

Tohoku Gakuin University

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Shoya Takeuchi

Tohoku Gakuin University

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Taisei Sasaki

Tohoku Gakuin University

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