Hironori Chikita

Ultra-high-speed lateral solid phase crystallization of GeSn on insulator combined with Sn-melting-induced seeding

To produce high-performance devices on flexible plastic substrates, it is essential to form Ge-based group IV semiconductors on insulating substrates at low temperatures (≤250 °C). We have developed a technique for solid phase crystallization of amorphous GeSn (≤220 °C) enhanced by Sn doping, and combined with a seeding technique induced by Sn melting (∼250 °C). This combination produces lateral crystallization of amorphous GeSn from seed arrays with no incubation time. As a result, extremely high growth velocities at 220 °C, depending on Sn concentration, e.g., 0.13 μm/h (14% Sn) and 1100 μm/h (23% Sn), are achieved. These velocities are 104–108 times higher than that of pure Ge. This technique enables growth of crystalline GeSn island arrays (diameters: 50–150 μm) at low temperatures (≤250 °C) at controlled positions on insulating substrates.

Low-temperature (∼180 °C) position-controlled lateral solid-phase crystallization of GeSn with laser-anneal seeding

To realize next-generation flexible thin-film devices, solid-phase crystallization (SPC) of amorphous germanium tin (GeSn) films on insulating substrates combined with seeds formed by laser annealing (LA) has been investigated. This technique enables the crystallization of GeSn at controlled positions at low temperature (∼180 °C) due to the determination of the starting points of crystallization by LA seeding and Sn-induced SPC enhancement. The GeSn crystals grown by SPC from LA seeds showed abnormal lateral profiles of substitutional Sn concentration. These lateral profiles are caused by the annealing time after crystallization being a function of distance from the LA seeds. This observation of a post-annealing effect also indicates that GeSn with a substitutional Sn concentration of up to ∼10% possesses high thermal stability. These results will facilitate the fabrication of next-generation thin-film devices on flexible plastic substrates with low softening temperatures (∼250 °C).

The effects of annealing temperatures on composition and strain in SixGe1-x obtained by melting growth of electrodeposited Ge on Si (100)

The effects of annealing temperatures on composition and strain in SixGe1−x, obtained by rapid melting growth of electrodeposited Ge on Si (100) substrate were investigated. Here, a rapid melting process was performed at temperatures of 1000, 1050 and 1100°C for 1 s. All annealed samples show single crystalline structure in (100) orientation. A significant appearance of Si-Ge vibration mode peak at ~00 cm−1 confirms the existence of Si-Ge intermixing due to out-diffusion of Si into Ge region. On a rapid melting process, Ge melts and reaches the thermal equilibrium in short time. Si at Ge/Si interface begins to dissolve once in contact with the molten Ge to produce Si-Ge intermixing. The Si fraction in Si-Ge intermixing was calculated by taking into account the intensity ratio of Ge-Ge and Si-Ge vibration mode peaks and was found to increase with the annealing temperatures. It is found that the strain turns from tensile to compressive as the annealing temperature increases. The Si fraction dependent thermal expansion coefficient of SixGe1−x is a possible cause to generate such strain behavior. The understanding of compositional and strain characteristics is important in Ge/Si heterostructure as these properties seem to give significant effects in device performance.

Ultra-low temperature (≤300 °C) growth of Ge-rich SiGe by solid-liquid-coexisting annealing of a-GeSn/c-Si structures

Ultra-low temperature (≤300 °C) growth of Ge-rich SiGe on Si substrates is strongly desired to realize advanced electronic and optical devices, which can be merged onto Si large-scale integrated circuits (LSI). To achieve this, annealing characteristics of a-GeSn/c-Si structures are investigated under wide ranges of the initial Sn concentrations (0%–26%) and annealing conditions (300–1000 °C, 1 s–48 h). Epitaxial growth triggered by SiGe mixing is observed after annealing, where the annealing temperatures necessary for epitaxial growth significantly decrease with increasing initial Sn concentration and/or annealing time. As a result, Ge-rich (∼80%) SiGe layers with Sn concentrations of ∼2% are realized by ultra-low temperature annealing (300 °C, 48 h) for a sample with the initial Sn concentration of 26%. The annealing temperature (300 °C) is in the solid-liquid coexisting temperature region of the phase diagram for Ge-Sn system. From detailed analysis of crystallization characteristics and composition profiles in grown layers, it is suggested that SiGe mixing is generated by a liquid-phase reaction even at ultra-low temperatures far below the melting temperature of a-GeSn. This ultra-low-temperature growth technique of Ge-rich SiGe on Si substrates is expected to be useful to realize next-generation LSI, where various multi-functional devices are integrated on Si substrates.

High quality, giant crystalline-Ge stripes on insulating substrate by rapid-thermal-annealing of Sn-doped amorphous-Ge in solid-liquid coexisting region

Formation of large-grain (≥30 μm) Ge crystals on insulating substrates is strongly desired to achieve high-speed thin-film transistors. For this purpose, we propose the methods of Sn-doping into amorphous-Ge combined with rapid-thermal-annealing (RTA) in the solid-liquid coexisting temperature region for the Ge-Sn alloy system. The densities of micro-crystal-nuclei formed in this temperature region become low by tuning the RTA temperature close to the liquidus curve, which enhances the lateral growth of GeSn. Thanks to the very small segregation coefficient of Sn, almost all Sn atoms segregate toward edges of the stripes during growth. Agglomeration of GeSn degrades the surface morphologies; however, it is significantly improved by lowering the initial Sn concentration. As a result, pure Ge with large crystal grains (∼40 μm) with smooth surface are obtained by optimizing the initial Sn concentration as low as 3 ∼ 5%. Lateral growth lengths are further increased through decreasing the number of nuclei in stripes by narrowing stripe width. In this way, high-crystallinity giant Ge crystals (∼200 μm) are obtained for the stripe width of 3 μm. This “Si-seed free” technique for formation of large-grain pure Ge crystals is very useful to realize high-performance thin-film devices on insulator.

Melting-Sn Induced Seeding-Processing for Low-Temperature Lateral-Crystallization of a-GeSn on Insulating Substrate

A new low-temperature crystallization technique of a-GeSn on insulator has been developed. Here, island-shaped Sn/a-Ge stacked-structures are covered with a-GeSn films and annealed in two-steps. This technique enables lateral solid-phase crystallization of a-GeSn films at a very low temperature (~200C), which is useful to realize high-performance devices on flexible plastic substrates.

Low-Temperature (~300°C) Epitaxial-Growth of SiGe(Sn) on Si-Platform by Liquid-Solid Coexisting Annealing

To develop a new low-temperature crystallization technique, annealing characteristics of a-GeSn/c-Si structures are examined as a function annealing temperature (200-1000 o C) and Sn concentration (10-30%). By Sn-doping (~26%) into a-Ge, SiGe-mixing and epitaxial-growth temperatures are significantly decreased, which enables SiGe(Sn) epitaxial-growth at 300 o C. These phenomena are attributed to liquid-phase-growth through partial-melting-channel running across liquid-solid coexisting region. This technique facilitates integration of multi-functional devices on Si-platform.

Low Temperature (~300°C) Epitaxial Growth of SiGe by Liquid-Solid Coexisting Annealing of A-GeSn/Si(100) Structure

To develop a new low-temperature crystallization technique, annealing characteristics of a-GeSn/Si (100) structures are investigated. It is revealed that epitaxial growth accompanying Si-Ge mixing is generated at temperatures in the liquid-solid coexisting region of the Ge-Sn system. The annealing temperature necessary for epitaxial growth is significantly decreased by increasing annealing time and/or Sn concentration. Consequently, epitaxial growth at 300°C becomes possible. These findings are expected to be useful to realize next-generation large-scale integrated circuits, where various multi-functional devices are integrated.

Formation of Giant SiGe Crystals on Insulator by Self-Organized-Seeding Rapid-Melting Growth

Rapid-melting growth of SiGe stripes on insulator without crystal-seed has been investigated. After rapid-thermal annealing (RTA) of amorphous SiGe stripes (~5 μm) at a temperature between melting-point and solidification-point, SiGe crystals with large lateral sizes (~20 μm) are formed. The Si concentrations in the grains show peaks at the center of the grains and gradually decrease toward the grain boundaries. These phenomena are explained based on the self-organized formation of Si-rich micro-crystals and subsequent Si-segregating lateral-growth during RTA.