Hironori Ishizaka

Water-based high-volume stress-free ultra-thin powder-chip method

We propose fabrication and subsequent packaging processes for ultra-small and ultra-thin (75×75×7.5 µm) radio frequency identification (RFID)-chips (called “RFID powder chips”). To fabricate a chip with no chipping and micro-cracks and to increase the chip yield per wafer, self-etch-stop thinning and 5-µm narrow dicing were performed using anisotropic dry etching in a SOI-wafer based process. Consequently, a damage-less 7.5-µm-thick RFID powder chip with an Au-coated double-surface electrode structure was obtained. The structure of the surface electrodes has the advantage that, when mounting the powder chip on an external antenna film for the packaging process, the chips are just placed in a relatively large electric-contact area on the antenna without the need for highly accurate positioning, orientation, and side surface controls. A technological issue for the packaging process is how to handle the powder chip. Because the chips not only form aggregated structures from electrostatic and van der Waals forces in a dry environment, but also are mechanically brittle, the conventional pick-up technique is unfeasible. Accordingly, we have developed a new water-based, stress-free chip handling technique. In this technique, the chips are kept dispersed by liquid stirring, and only a single chip is captured and manipulated using a micropipette. The water-based chip capturing process strongly depends on dispersion and mobility controls of the chips. Yield rates for various liquid solutions and stirring speeds were investigated. Addition of 0.5% non-ionic surfactant to the powder chip stock solutions effectively prevented chips from sticking together. Also, high capture rates above 90% were obtained with stirring speeds ranging from 1000 to 1200 rpm. The positioning accuracy of the chip placing process was also investigated. Using robotic actuators with repeatable positioning accuracies of above +/− 50 µm in chip manipulation, a 100% success rate was obtained in the case of the square placing-area of 300 µm. During pick-up and place operation, no chip breakage was observed.

A stripline feed type planar antenna for 12 GHz satellite broadcasting reception

By contributing the parallel plate mode to the gain and optimizing the element spacing, a high-efficiency planar antenna at a 248-element array has been developed for satellite broadcasting reception. This antenna has achieved a gain from 32.5 dB to 33.1 dB and an efficiency from 71.8% to 78.6%.<<ETX>>