Hiroshi Hamori
Hiroshima University
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Publication
Featured researches published by Hiroshi Hamori.
Artificial Intelligence Review | 2013
H. A. Abeysundara; Hiroshi Hamori; Takeshi Matsui; Masatoshi Sakawa
This paper proposes a novel approach for inspection of open/short defects on thin film transistor (TFT) lines of flat panel displays (FPD). The inspection is performed on digitized waveform data of voltage signals that are captured by a capacitor based non-contact sensor by scanning over TFT lines on the surface of mother glass of FPD. The sudden deep falls (open circuits) or sharp rises (short circuits) on the captured noisy waveform are classified and detected by employing a four-layer feed forward neural network with two hidden layers. The topology of the network consist of an input layer with two units, two hidden layers with two and three units respectively and an output layer with one unit and a standard sigmoid function as the activation function of each unit. The network is trained with a fast adaptive back-propagation algorithm to find an optimal set of associated weights of neurons by feeding a known set of input data. This method is an alternative to the existing thresholding based non-contact method which has always its own limitations and drawbacks due to some non-avoidable features of input data such as non-stationary patterns and varying magnitude levels at defect points. Experimental results show that this method can adapt fast for new input patterns and avoids the ambiguity of threshold definitions and therefore it is more feasible than the existing thresholding method.
annual conference on computers | 2010
Hiroshi Hamori; Masatoshi Sakawa; Hideki Katagiri; Takeshi Matsui
Research of the inspection and defect repair process for improving the production yield is becoming more important in the flat panel production process which remarkably expands in recent years. In this research, a new non-contact inspection method for the fast and accurate detection of electrical defects subject to repair in a-Si TFT circuits is proposed. The proposed method enables much faster inspection in comparison with the conventional Pin Probe inspection method which has been used for years. In addition, since it can not only detect defects in the target circuit but also specify the location of each defect, a more efficient process management can be realized by having such information in common with the repair system. Further, this non-contact method can eliminate a running cost which has been the most serious problem in the test process by removing the need to replace the pin probing fixtures which vary depending on the circuit type.
Archive | 2016
Hideki Katagiri; Qingqiang Guo; Hongwei Wu; Hiroshi Hamori; Kosuke Kato
This paper discusses a new route optimization for inspecting printed circuit boards (PCBs). In inspections of PCBs, a number of PCBs arrayed on a plane are tested by a probe in some order or sequence. Since the length of an inspection route depends on the order or sequence that the probe visits and tests each of PCBs, the finding of best visiting order or sequence is quite important in order to reduce the PCB inspection time. Recently, due to the miniaturization of PCBs, the procedure of “alignment” has become necessary before the electrical test, which means that there is a precedence constraint between alignment and test. This paper models a PCB inspection route optimization problem with alignment operations as a class of pickup and delivery traveling salesman problem (PDTSP) which is a mixed 0–1 integer programming problem. An efficient heuristic algorithm is proposed to solve the problem with a practical computational time. The proposed algorithm is installed into real PCB inspection machines that have been widely used in the world. Cost reduction effects for PCB inspection factories are discussed.
modeling decisions for artificial intelligence | 2014
H. A. Abeysundara; Hiroshi Hamori; Takeshi Matsui; Masatoshi Sakawa
Thin film transistor (TFT) lines on glass substrates of flat panel displays (FPD) often contain many electrical defects such as open circuits and short circuits that have to be inspected and detected in early manufacturing stages in order to repair and restore them. This paper proposes a multiobjective evolutionary optimized recurrent neural network for inspection of such electrical defects. The inspection is performed on digitized waveform data of voltage signals that are captured by a capacitor based non-contact sensor through scanning over TFT lines on the surface of mother glass of FPD. Waveform data that were captured over TFT lines, which contain open or short circuits, show irregular patterns and the proposed RNN is capable of classifying and detecting them. A multiobjective evolutionary optimization process is employed to determine the parameters of the best suited topology of the RNN. This method is an extension to address the drawbacks in our previous work, which utilizes a feed-forward neural network. Experimental results show that this method is capable of detecting defects on more realistic and noisy data than both of the previous method and the conventional threshold based method.
Computational Intelligence and Applications (IWCIA), 2014 IEEE 7th International Workshop on | 2014
Hideki Katagiri; Masashi Morisawa; Hongwei Wu; Hiroshi Hamori; Kosuke Kato
Pin probe inspection methods have been widely used in printed circuit board electrical inspection. Due to the miniaturization of electronic devices, the positioning of inspection jig (called probe jig) is very important for precisely conducting pattern tests of wiring on PCBs. This article newly develops a probe jig position correction algorithm that automatically calculates optimal correction amounts of a probe jig through interactive processes between an operator and the system. In the proposed method, optimal correction amounts of a probe jig are calculated by nonlinear programming techniques. The proposed algorithm is installed into real PCB inspection machines. It is shown that the proposed method significantly reduces the setup time for PCB inspections.
Procedia Computer Science | 2013
H. A. Abeysundara; Hiroshi Hamori; Takeshi Matsui; Masatoshi Sakawa
Abstract This paper proposes a neural network-based approach for the inspection of electrical defects on thin film transistor lines of flat panel displays. The inspection is performed on digitized waveform data of voltage signals that are captured by a capacitor-based non-contact sensor by scanning over thin film transistor lines on the surface of the mother glass of flat panels. The sudden deep falls (open circuits) or sharp rises (short circuits) on the captured noisy waveform are classified and detected by employing a four-layer feed-forward neural network with two hidden layers. The topology of the network comprises an input layer with two units, two hidden layers with two and three units, and an output layer with one unit; a standard sigmoid function as the activation function for each unit. The network is trained with a fast adaptive back-propagation algorithm to find an optimal set of associated weights of neurons by feeding a known set of input data. The ambiguity of the threshold definition does not arise in this method because it uses only local features of waveform data at and around selected candidate points as inputs to the network, unlike the existing thresholding-based method, which is inherently prone to missed detections and false detections.
Computational Research | 2014
H. A. Abeysundara; Hiroshi Hamori; Takeshi Matsui; Masatoshi Sakawa
American Journal of Operations Research | 2014
Hapu Arachchilage Abeysundara; Hiroshi Hamori; Takeshi Matsui; Masatoshi Sakawa
Journal of Japan Institute of Electronics Packaging | 2010
Hiroshi Hamori; Masatoshi Sakawa; Hideki Katagiri; Takeshi Matsui
KES | 2015
Hideki Katagiri; Qingqiang Guo; Wang Bin; Tomoyuki Muranaka; Hiroshi Hamori; Kosuke Kato