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Dive into the research topics where Hiroshi Koya is active.

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Featured researches published by Hiroshi Koya.


Journal of The Electrochemical Society | 1997

The Effect of Hydrogen Annealing on Oxygen Precipitation Behavior and Gate Oxide Integrity in Czochralski Si Wafers

Hidenobu Abe; Isamu Suzuki; Hiroshi Koya

We investigated the effect of hydrogen annealing in the temperature range from 850 to 1200°C on oxygen precipitation and gate oxide integrity in Czochralski Si wafers. The bulk microdefect density of dynamic random access memory thermal simulation wafers showed a strong dependence on the ramp-up rate conditions of hydrogen annealing. The gate oxide integrity improved after hydrogen annealing at temperatures above 1000°C. However, for better stability of the gate oxide integrity after the heat-treatment, higher temperature annealing is necessary. We observed that the effect of hydrogen annealing was limited to the near surface, because the gate oxide integrity of hydrogen-annealed wafers degraded to that for nonannealed wafers after repolishing.


Japanese Journal of Applied Physics | 1995

Effect of SC1 Process on Silicon Surface Microroughness and Oxide Breakdown Characteristics

Kazuhiro Akiyama; Nobumasa Naito; Motoaki Nagamori; Hiroshi Koya; Etsuro Morita; Kouichi Sassa; Hisaaki Suga

Surface microroughness and its effects on dielectric breakdown characteristics have been investigated for silicon wafers treated in SC1-based solutions. Surface microroughness was quantified using atomic force microscopy (AFM) and phase shift interferometry (PSI). In contrast to previous reports that SC1 treatment caused undulation of the surface, our observation showed a nominal amount of deterioration. Even prolonged dipping in a solution with high etching rate did not roughen the surface, and the dielectric breakdown characteristics were not affected.


Archive | 1993

Effect of Solidification Induced Defects in CZ- Silicon Upon Thin Gate Oxide Integrity

Hisaaki Suga; Hidenobu Abe; Hiroshi Koya; Toshihiro Yoshimi; Isamu Suzuki; Hideo Yoshioka; Norio Kagawa

In this study, dielectric breakdown strength of silicon dioxide film of 5 to 25nm in thickness is revealed to be determined only by the amount of tiny solidification induced defects in magnetic field applied and conventional CZ silicon single crystals. Nucleus of oxygen induced stacking fault, heavy metal impurities on the surface and surface microroughness are less sensitive factors for it. The deteriorated integrity of the thin films is recovered only by the high temperature annealing at 1250°C under oxygen ambient.


Archive | 2000

Silicon wafer, and manufacturing method and heat treatment method of the same

Etsuro Morita; Takaaki Shiota; Yoshihisa Nonogaki; Yoshinobu Nakada; Hisashi Furuya; Hiroshi Koya; Jun Furukawa; Hideo Tanaka; Yuji Nakata


Archive | 2002

Silicon wafer, and heat treatment method of the same and the heat-treated silicon wafer

Hiroshi Koya; Hisashi Furuya; Yoji Suzuki; Yukio Muroi; Takaaki Shiota


Archive | 2000

Silicon wafer used in the production of semiconductor circuits has a low number of particles of crystalline origin in the wafer surface

Etsuro Morita; Takaaki Shiota; Yoshihisa Nonogaki; Yoshinobu Nakada; Jun Furukawa; Hisashi Furuya; Hideo Tanaka; Yuji Nakata; Hiroshi Koya


Archive | 2000

Process for heat treating a silicon wafer used in the production of semiconductor circuits comprises forming a silicon wafer having a specified oxygen concentration

Hiroshi Koya; Hisashi Furuya; Yoji Suzuki; Yukio Muroi; Takaaki Shiota


Archive | 2000

Siliciumwafer und Wärmebehandlungsverfahren desselben und der wärmebehandelte Siliciumwafer

Hiroshi Koya; Hisashi Furuya; Yoji Suzuki; Yukio Muroi; Takaaki Shiota


Archive | 2000

Verfahren zur Wärmebehandlung eines Siliciumwafers und der wärmebehandelte Siliciumwafer A method for heat treating a silicon wafer and the heat-treated silicon wafer

Hiroshi Koya; Yukio Muroi


Archive | 2000

Silicon wafer used for depositing a thin film epitaxial layer in the production of bipolar high performance transistors has a specific resistance

Hiroshi Koya; Masataka Kimura; Kazuhiro Ikezawa; Ken Nakajima; Tamiya Karashima; Hiroyuki Shiraki

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