Hisanori Uda
Denso
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Publication
Featured researches published by Hisanori Uda.
radio frequency integrated circuits symposium | 2003
Jan Steinkamp; Frank Henkel; Uwe Stehr; Cornelia Eube; Peter Waldow; Hisanori Uda; Hiroaki Hayashi; Ryu Kimura; Kazuo Mizuno
A varactor tuned oscillator with an external SAW resonator and integrated frequency doubler is developed on a low cost 0.8 /spl mu/m SiGe BiCMOS technology for a DSRC application. The measured phase noise is -95.5 dBc/Hz at 10 kHz offset on a single-ended 50 /spl Omega/ load. A PMOS accumulation-mode varactor is used for the fine tuning of the oscillation frequency within a tuning range of 800 kHz. Furthermore a 2/sup nd/ not tunable oscillator is fabricated with an improved phase noise of -105.65 dBc/Hz at 10 kHz offset. Frequency doubling is achieved by using two unbalanced emitter coupled pairs with a fundamental frequency rejection of better than 20 dBc.
Archive | 2003
Kazuo Mizuno; Ryu Kimura; Yoshiyuki Kago; Yukiomi Tanaka; Kazuhiko Endo; Hisanori Uda; Hiroaki Hayashi
Archive | 2010
Yasuyuki Miyake; Hisanori Uda
Archive | 2007
Tetsuya Katayama; Hisanori Uda
Archive | 2008
Hisanori Uda; Tetsuya Katayama
Archive | 2008
Tetsuya Katayama; Hisanori Uda
Archive | 2004
Hisanori Uda; Hiroaki Hayashi; Yoshiyuki Kago; Yukiomi Tanaka; Kazuhiko Endo
Archive | 2004
Hisanori Uda; Hiroaki Hayashi; Yoshiyuki Kago; Yukiomi Tanaka; Kazuhiko Endo
Archive | 2003
Kazuo Mizuno; Ryu Kimura; Hisanori Uda; Hiroaki Hayashi
Archive | 2007
Tetsuya Katayama; Hisanori Uda
