Hisayuki Tatsumi
Kanagawa Institute of Technology
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Publication
Featured researches published by Hisayuki Tatsumi.
international conference on nanotechnology | 2001
Yasuyuki Murai; Hisayuki Tatsumi; Shinji Tokumasu
In this paper, a rectilinear jigsaw puzzle is taken up as a specialized placement problem such that it has at least one solution of placement, but not so many in general. In order to solve this problem, instead of adopting the well known iterative method, a new game-theoretic algorithm is developed by translating the problem to a checkmate problem of a game analogous to chess or shogi. It is proved by numerical experiments that this works well with good efficiency.
international symposium on multiple valued logic | 2001
Hisayuki Tatsumi; Yasuyuki Murai; Shinji Tokumasu
This paper presents a new method of logic diagnosis for combinatorial logic circuits. First, for each type of circuit gates, an equivalent neural network gate is constructed. Then, by replacing circuit gate elements with corresponding neural network gates, an equivalent neural network circuit is constructed to the fault-free sample circuit. The testing procedure is to feed random patterns to both the neural network circuit and the fault-prone test circuit at the same time, and comparing, analyzing both outputs, the former circuit generates diagnostic data for the test circuit. Thus, the neural network circuit behaves like a diagnostic engine, and needs basically no preparation of special test patterns nor fault dictionary before diagnosing.
annual european computer conference | 1992
Kimio Goto; Hisayuki Tatsumi
A method is given for further minimizing the multilevel NAND gate circuit having single-rail inputs obtained by applying the inhibiting-loop method of K. Goto (1989) to the given function. Using several theorems proposed by the authors several rules are used to determine whether the same input exists in the preceding and succeeding gate levels, and to determine whether the common input exists at the same first level of some parallel multilevel NAND gates, or other conditions. The Lisp language program utilizing this method was run on the microVAX-II computer for three-variable P-equivalence classes and four-variable functions. As a result, the coincidences for the three-variable functions and four-variable functions between the ideal results and the obtained results were 40% and 11%, respectively, when using the inhibiting-loop method alone. However, the results improved to 90% and 64%, respectively, by the addition of this reducing method.<<ETX>>
한국지능시스템학회 국제학술대회 발표논문집 | 2003
Hisayuki Tatsumi; Yasuyuki Murai; Hiroyuki Tsuji; Shinji Tokumasu; Masahiro Miyakawa
international symposium on multiple valued logic | 1998
Hisayuki Tatsumi; Tomoyuki Araki; Masao Mukaidono; Shinji Tokumasu
数理解析研究所講究録 | 2013
Hisayuki Tatsumi; Masahiro Miyakawa; Masao Mukaidono
数理解析研究所講究録 | 2013
Masahiro Miyakawa; Maurice Pouzet; Ivo G. Rosenberg; Hisayuki Tatsumi
情報科学技術フォーラム講演論文集 | 2010
Yasuyuki Murai; Masaji Kawahara; Hisayuki Tatsumi; Iwao Sekita; Masahiro Miyakawa
Archive | 2006
Yasuyuki Murai; Hisayuki Tatsumi; Masahiro Miyakawa
Archive | 2006
Hisayuki Tatsumi; Masahiro Miyakawa