Hitoki Tokuda

Dielectric Properties of SrTiO3 Thin Films Grown by Ozone-Assisted Molecular Beam Epitaxy

Crystalline SrTiO3 thin films were fabricated by an ozone-assisted molecular beam epitaxy (MBE) method at a relatively low deposition temperature of around 300° C. These films had high crystallinity, smooth surface and insulating properties with increasing deposition temperature. The relative dielectric constant for a 250-nm-thick SrTiO3 film deposited at 480° C was 825 at 35 K. This value was comparable to that of SrTiO3 films, which were deposited at over 650° C by pulsed laser deposition. This film had similar temperature and applied electric field dependence to bulk SrTiO3. The electric field-effect evaluation on SrTiO3 films in the Ag/SrTiO3/YBa2Cu3O7-x configuration indicated suppression of the SrTiO3/YBa2Cu3O7-x interface layer.

All in situ deposition and characterization of YBa2Cu3O7-x thin films by low-energy electron diffraction and low-energy ion scattering spectroscopy

In an ultrahigh vacuum apparatus, c‐axis oriented YBa2Cu3O7−x (YBCO) thin films were deposited by an ozone‐assisted reactive coevaporation method and characterized by low‐energy electron diffraction (LEED) and low‐energy ion scattering spectroscopy (LEISS). A clean surface with crystal perfection within the top two monolayers was confirmed by LEED for the first time. LEISS analysis showed that this clean surface is terminated by Cu(1)‐O chains. These experiments also indicate that the oxygen pressure and the vacuum condition are one of the essential factors in keeping an outermost surface clean.

Electric field effect of SrTiO/sub 3//YBa/sub 2/Cu/sub 3/O/sub 7-x/ multilayers grown by all-MBE

Epitaxial SrTiO/sub 3//YBa/sub 2/Cu/sub 3/O/sub 7-x/ (STO/YBCO) multilayers for a superconducting field-effect transistor (SuFET) were fabricated by an ozone assisted Molecular Beam Epitaxy (MBE) method. To eliminate interdiffusion at the interface, we deposited high quality STO films at around 500/spl deg/C on YBCO films with clean surfaces. At this temperature, interdiffusion was negligible through in-situ Auger Electron Spectroscopy (AES). The electric field effect in a Ag/STO/YBCO device configuration also indicated the suppression of the interfacial layer between the STO and YBCO film.<<ETX>>

Electric Field Effect in SrTiO3/YBa2Cu3O7-x Multilayers Grown by All-MBE

SrTiO3/YBa2Cu3O7-x(STO/YBCO) multilayers were grown on STO(100) substrates by an ozone-assisted MBE method, which enables us to grow thin films with smooth surfaces at relatively low substrate temperature. Film surfaces were evaluated by RHEED, LEED, XPS and ISS. These observations showed the YBCO surfaces were smooth, clean and crystalline and terminated by Cu-O chains, and STO films grew epitaxially onto these YBCO(001) surfaces. Furthermore, we made use of a selective epitaxial growth technique to fabricated device configurations in course of film depositions. Applying this process to a FET fabrication, we observed field effect modulations of drain current both in normal and in superconducting states.

Low On-Resistance in 4H-SiC RESURF JFETs Fabricated with Dry Process for Implantation Metal Mask

We fabricated 4H-SiC lateral JFETs with a reduced surface field (RESURF) structure, which can prevent the concentration of electric field at the edge of the gate metal [1]. Previously, we reported on the 4H-SiC RESURF JFET with a gate length (LG) of 10 μm [2]. Its specific on-resistance was 50 mΩcm2, which was still high. Therefore, a Ti/W layer was used as an ion implantation mask so as to decrease the thickness of the mask and to improve an accuracy of the device process. A RESURF JFET with the gate length (LG) of 3.0 μm was fabricated, and the specific on-resistance of 6.3 mΩcm2 was obtained. In this paper, the fabrication process and the electrical characteristics of the device are described.

High Temperature Characteristics of 4H-SiC RESURF-Type JFET

400V/2.5A 4H-SiC JFETs having a reduced surface field (RESURF) structure were fabricated. Measurements on the on-resistance, blocking and switching characteristics at high temperature were carried out. It was confirmed that the JFET has smaller dependence of on-resistance on temperature than a Si-MOSFET and positive temperature dependence of the breakdown voltage. It was also confirmed that the JFET has fast switching characteristics, that is, the turn-on and turn-off times are about 15 ns and 10 ns, at 200 °C as well as at 25 °C. A demonstration of a DC-DC converter using a module consisting of the JFET was carried out at a junction temperature of 200 °C. Stable continuous switching operation of the JFET at a junction temperature of 200 °C was confirmed.

Fabrication of a multi-chip module of 4H-SiC RESURF-type JFETs

We fabricated a multi-chip module of 4H-SiC reduced surface field (RESURF)-type lateral JFETs. A single chip consists of 4 unit devices of 2.0 mm × 0.5 mm in size, which were isolated electrically from each other. The multi-chip module consists of 8 chips mounted on an AMC substrate. The drain current and the breakdown voltage of the module are over 3 A and 771 V, respectively. The turn-on time and the turn-off time are 36ns and 166ns, respectively. The module resistance is proportional to the absolute temperature to the 1.05th power.

Surface Characterization of YBCO Thin Films by LEED, XPS and ISS

Surface characterization by in-situ analysis is presented for c-axis oriented YBCO thin films deposited by the ozone-assisted MBE method. By in-situ LEED and XPS analysis, we confirmed that the surface of the as-grown film was clean and crystalline. ISS analysis revealed that the clean surface was terminated at the Cu-O chain.