Hitoshi Hemmi

Development and Evolution of Hardware Behaviors

A new system is proposed towards the computational frame-work of evolutionary hardware that adaptively changes its structure and behavior according to the environment. In the proposed system, hardware specifications, which produce hardware structures and behaviors, are automatically generated as Hardware Description Language (HDL) programs. Using a rewriting system, the system introduces a program development process, that imitates the natural development process from pollinated egg to adult and gives the HDL-program flexible evolvability. Also discussed is a method to evolve the language itself by modifying the corresponding rewriting system. This method is intended to serve as hierarchal mechanism of evolution and to contribute to the evolvability of large-scale hardware. Although this papers discussion is mainly involves in HDL-programs because our goal is hardware evolution, the techniques described here are applicable to ordinary computer programs written in such conventional formats as “C” language.

Production genetic algorithms for automated hardware design through an evolutionary process

Production genetic algorithms is proposed to enable grammar structure as well as hardware description language (HDL) programs to evolve, toward an automated hardware design system through an evolutionary process. Evolutionary computation and methods make it possible to design hardware that works in unknown and non-stationary environments without explicit design knowledge. In the proposed system, hardware specifications, which produce circuit behaviors, are automatically generated as HDL programs according to the grammar defined as in a rewriting system and then evolve through production genetic algorithms (PGAs), also proposed here. The PGAs introduce new chromosome representation and genetic operators to create self-genesis mechanisms in hardware design similar to living systems. An experimental result shows that through an evolutionary process based on the PGAs, a hardware specification program expands its circuit scale and as a result increases its functionality.<<ETX>>

Evolution of the driving styles of anticipatory agent remotely operating a scaled model of racing car

We present an approach for automated evolutionary design of driving agent, able to remotely operate a scale model of racing car running in a fastest possible way. The agents actions are conveyed to the car via standard radio control transmitter. The agent perceives the environment from a live video feedback of an overhead camera. In order to cope with the inherent video feed latency, which renders even the straightforward tasks of following simple routes unsolvable, we implement an anticipatory modeling - the agent considers its current actions based on anticipated intrinsic (rather than currently available, outdated) state of the car and its surrounding. The driving style (i.e. the driving line combined with the speed at which the car travels along this line) is first evolved offline on a software simulator of the car and then adapted online to the real world. Experimental results demonstrate that on long runs the agent-operated car is only marginally slower than a human-operated one, while the consistence of lap times posted by the evolved driving style of the agent is better than that of a human. This work can be viewed as a step towards the development of a framework for automated design of the controllers of remotely operated vehicles capable to find an optimal solution to various tasks in different traffic situations and road conditions.

Progressive evolution model using a hardware evolution system

A progressive evolution model is proposed in which evolution takes place stepwise to match environmental changes. This model was designed to accelerate evolution. Environmental complexity is defined, and the problem environment progresses in environmental complexity gradually from easy to difficult. A verification system for the model is constructed on a hardware evolution system called AdAM (adaptive architecture methodology) in which each individual circuit takes parallel input sequences and operates on this input. A measure that is suitable for such parallel simultaneous operations schemes is designed to express environmental complexity. Simulations using an artificial ant problem (a modified John Muir trail) show that in the progressive evolution model, circuits can easily evolve complex behaviors.

Hardware Evolution System Introducing Dominant and Recessive Heredity

This paper proposes a new hardware evolution system — a new AdAM (Adaptive Architecture Methodology), that introduces dominant and recessive heredity through diploid chromosomes in order to increase genetic diversity. Dominant and recessive heredity is implemented by two techniques: one node of a tree-structured chromosome can have two sub-trees corresponding to alleles: Dominant or recessive attributes of a new pair of sub-trees is decided randomly. Simulations using the artificial ant problem show that the new AdAM is superior to the old one in adaptability and robustness in the face of a changeable environment.

An evolutionary system for the prediction of gene regulatory networks in biological cells

Estimation or prediction of gene regulatory networks is an important problem for the elucidation of biological mechanisms. This paper presents a method to predict gene regulatory networks from gene expression time course data, based on a ultra high speed gene network simulator Starpack and evolutionary mechanisms. The proposed method predicts gene regulatory network from gene expression time course data. The prediction is a combination of two stage loop, each stage using evolutionary mechanism. Networks are simulated with Starpack, and those producing time course data similar to the target gene expression data are selected as candidates. The simulation of the second stage has higher precision than the first stage, serving as local optimization process. Five synthetic networks were tested, and the performance of the proposed method was higher than conventional methods.

Comparison of Evolutionary Methods for Smoother Evolution

Hardware evolution methodologies come into their own in the construction of real-time adaptive systems. The technological requirements for such systems are not only high-speed evolution, but also steady and smooth evolution. This paper shows that the Progressive Evolution Model (PEM) and Diploid chromosomes contribute toward satisfying these requirements in the hardware evolutionary system AdAM (Adaptive Architecture Methodology). Simulations of an artificial ant problem using four combinations of two wets of variables — PEM vs. non-PEM, and Diploid AdAM vs. Haploid AdAM — show that the Diploid-PEM combination overwhelms the others.

Hardware evolution — a real “life on the silicon”

A hardware evolutionary system is proposed that automatically changes hardware description language specifications of digital circuits and adapts them to applied specific problems. Outputs from the system can be converted to real electronic circuits instead of the conceptual data structure in computer memory. Such individual circuits can be seen as an artificial life that behaves at electronic speed: true “life on the silicon.”

Link prediction of complex networks from temporal quantity variation assigned to elements

This paper presents a method to predict gene regulatory networks from gene expression time course data, where each gene has multiple types of quantity values and each quantity type might be influenced by all other quantity types. This problem is considerably harder than the prediction from time course data of only one quantity type. The method is based on a ultra high speed gene network simulator Starpack and evolutionary mechanisms. The prediction is a combination of two stage loop, each stage using evolutionary mechanism. Networks are simulated with Starpack, and those producing time course data similar to the target gene expression data are selected as candidates. The simulation of the second stage has higher precision than the first stage, serving as local optimization process. A synthetic network was used for evaluation, and results suggest necessity of improvements.

Hardware evolution system AdAM

tiple GRD chips can be easily connected to configure scalable neural network hardware. Because a RISC processor is incorporated within the GRD chip, it does not need the host machine control for these tasks. This is desirable for embedded systems in practical industrial applications, together with the fast online learning capability. The results on simulating an adaptive equalizer in digital mobile communication have showed that execution with a single GRD chip took 2.51 seconds, whereas execution on a Sun Ultra2 200MHz chip takes 36.87 seconds. The planned use of the GRD chip includes applications whose environments vary over time and have real-time constraints, such as CATV modems.