Hitoshi Itoh
Toshiba
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Featured researches published by Hitoshi Itoh.
IEEE Transactions on Electron Devices | 1990
F. Matsuoka; Hiroshi Iwai; K. Hama; Hitoshi Itoh; R. Nakata; T. Nakakubo; K. Maeguchi; Koichi Kanzaki
Experiments have shown that the electromigration reliability for conventional nonfilled via holes decreases with via hole diameter reduction. Tungsten-filled via hole reliability, however, is independent of the via hole diameter and improves significantly compared with the nonfilled via hole structure. The electromigration failure mechanism for the tungsten-filled via hole structures was investigated by two-dimensional numerical simulation. Current crowding points were found near the via hole edge in the aluminum part. Via hole resistance change during the electromigration test was also evaluated. When aluminum-silicon was used for the metal lines, via hole resistance increased, due to the migration of silicon in the aluminum line. However, it was estimated as being negligibly small for unusual operating conditions. >
Microelectronic Engineering | 1999
Hitoshi Itoh; Makoto Nagamine; Hideki Satake; A. Toriumi
Abstract We have reported both the experimental results of the flat interface formation and its mechanism based upon the theoretical analysis of the oxygen radical transport in the grown SiO2. We obtained the logarithmic dependence of the oxide film thickness on the oxidation time on the assumption that the deactivation of the oxygen radicals is proportional to the concentration. The characteristic length “a” of the oxygen radicals plays an important role in forming the flat interface.
international electron devices meeting | 2000
Yuichiro Mitani; Hideki Satake; Hitoshi Itoh; Akira Toriumi
This paper reports on the realization of highly reliable deuterated oxide by deuterium pyrogenic oxidation and poly-Si deposition using deuterated monosilane gas (SiD/sub 4/). The properties of these deuterated oxides are compared with those of deuterium-annealed oxide. It is concluded that the improvement of the gate oxide reliability by a deuterium incorporation is dependent on the method whereby deuterium is incorporated into gate oxide film and that deuterium atoms, which are incorporated into both Si/SiO/sub 2/ interface and bulk-SiO/sub 2/ by the oxidation and poly-Si deposition, play an important role in the suppression of electron trap creation under Fowler-Nordheim (F-N) stress.
IEEE Transactions on Electron Devices | 2002
Yuichiro Mitani; Hideki Satake; Hitoshi Itoh; Akira Toriumi
Reports on the effect of deuterium incorporation into gate oxide on stress-induced leakage current (SILC) under Fowler-Nordheim (F-N) electron injection. Deuterium atoms were introduced during the growth of the gate oxide by deuterium pyrogenic oxidation. A deuterated poly-Si film was also utilized as a gate electrode. The deuterated poly-Si gate electrode was deposited by deuterated monosilane (SiD/sub 4/) gas, as a substitute for hydrogenated monosilane (SiH/sub 4/) gas. The properties of the deuterated oxide were compared with those of deuterium-annealed oxide, i.e., the conventional method for deuterium incorporation into gate oxide. As a result, it was found that SILC after both polarities of F-N stressing was clearly suppressed by the use of both the deuterium pyrogenic oxide and the deuterated poly-Si gate. Experimental results for the depth profiles and thermal desorption characteristics of introduced-deuterium atoms, compared with the case of the deuterium annealing, indicated that both the deuterium incorporation not only into the Si/SiO/sub 2/ interface but also into bulk-SiO/sub 2/ and the more stable chemical bonding of deuterium atoms are realized by deuterium pyrogenic oxidation.
international electron devices meeting | 1998
Makoto Nagamine; Hitoshi Itoh; Hideki Satake; Akira Toriumi
It has been clarified that the radical oxidation with the oxygen remote plasma improves the electrical reliability of the SiO/sub 2/ films, compared with the dry oxidation. By TEM observation and X-ray-scattering-reflectivity spectroscopy it was demonstrated that, in the radical oxides, planarization of the SiO/sub 2//Si[100] interface and densification of the SiO/sub 2/ films due to repairing of the SiO/sub 2/ network were realized, compared with those in the dry oxides. Moreover, it was also found that the radical oxidation can realize a reliable SiO/sub 2/ in the lower oxidation temperatures even down to 700/spl deg/C.
international electron devices meeting | 1985
Hitoshi Itoh; R. Nakata; T. Moriya
The selective W-CVD produces self-alligned structures and is useful for the VLSI metallization. One of the problems using this technique is to control the encroachment that W penetrates along SiO2/Si interface. The silicon reduction of WF6was investigated in detail especially in the high temperature region. We found a perfect encroachment-free process and the W creep-up phenomena that W thin film creeps up onto the SiO2surface over patterned SiO2/Si boundary line on condition that the deposition is performed at 550°C on the patterned Si substrate with heavily doped layer. The mechanism of the phenomena and thier applications to the VLSI technologies are described in this paper.
Journal of Vacuum Science & Technology B | 2002
Hitoshi Itoh; Yuichirou Mitani; Hideki Satake
To analyze the structure of the SiO2/Si interface, we developed a method that uses spectroscopic ellipsometry and x-ray reflectometry simultaneously. We applied this method to the characterization of SiO2 grown in dry oxygen. We found that the thickness of the interface layer showed no significant dependence on the oxidation temperature and oxide film thickness. The mean value of the interface layer density was 2.31 g/cm3, clearly higher than that of the upper layer, which was 2.28 g/cm3. Furthermore, we found that the distribution of the interface layer density in the 6 in. wafer was similar to the distribution of the interface state density, Dit, which was obtained by the charge-pumping method using metal–oxide–semiconductor field-effect transistors with SiO2 formed in the same oxidation process. This fact strongly suggests that the density of the interface layer is correlated closely with the electrical characteristics of the SiO2/Si interface.
Archive | 1996
Hitoshi Itoh; Akiko Nara; Makoto Nagamine
Archive | 1998
Makoto Nagamine; Hitoshi Itoh
Archive | 1987
Hitoshi Itoh