Hock Guan Ong

Origin of hysteresis in the transfer characteristic of carbon nanotube field effect transistor

Using electrostatic force microscopy, we show direct evidence of charge injection at the carbon nanotube–SiO2 interface leading to the appearance of hysteresis. The dynamic screening effect of the injected charges is revealed step by step. Further temperature dependent tests also demonstrate the effect of SiO2 surface chemistry. Furthermore, we conclude that it is not practical to use such a device for memory application because of data retention and storage density issues.

Charge trapping-detrapping induced resistive switching in Ba0.7Sr0.3TiO3

Intensive research has been devoted to the resistive switching phenomena observed in many transitional metal oxides because of its potential for non-volatile memory application. To clarify the underlying mechanism of resistive switching, a planar device can provide information that is not accessible in conventional vertical sandwich structures. Here we report the observation of resistive switching behavior in a Pt/Ba0.7Sr0.3TiO3/Pt planar device. Using in-situ scanning Kelvin probe microscopy, we demonstrate that charge trapping/detrapping around the Pt/Ba0.7Sr0.3TiO3 interface modulates the Schottky barrier, resulting in the observed resistive switching. The findings are valuable for the understanding of resistive switching in oxide materials.

Oxygen Vacancy Induced Room-Temperature Metal–Insulator Transition in Nickelate Films and Its Potential Application in Photovoltaics

Oxygen vacancy is intrinsically coupled with magnetic, electronic, and transport properties of transition-metal oxide materials and directly determines their multifunctionality. Here, we demonstrate reversible control of oxygen content by postannealing at temperature lower than 300 °C and realize the reversible metal-insulator transition in epitaxial NdNiO₃ films. Importantly, over 6 orders of magnitude in the resistance modulation and a large change in optical bandgap are demonstrated at room temperature without destroying the parent framework and changing the p-type conductive mechanism. Further study revealed that oxygen vacancies stabilized the insulating phase at room temperature is universal for perovskite nickelate films. Acting as electron donors, oxygen vacancies not only stabilize the insulating phase at room temperature, but also induce a large magnetization of ∼50 emu/cm³ due to the formation of strongly correlated Ni²⁺ t(2g)⁶e(g)² states. The bandgap opening is an order of magnitude larger than that of the thermally driven metal-insulator transition and continuously tunable. Potential application of the newly found insulating phase in photovoltaics has been demonstrated in the nickelate-based heterojunctions. Our discovery opens up new possibilities for strongly correlated perovskite nickelates.

Charge injection at carbon nanotube-SiO2 interface

Most single-wall carbon nanotube field-effect transistors show significant hysteresis in their transfer characteristics between forward and reverse gate bias sweeps. It was proposed that the hysteresis is due to a dynamic charging process at the carbon nanotube-dielectric interface. We have studied the charge injection and subsequent discharging processes at the carbon nanotube-SiO2 interface using electrostatic force microscopy. It was observed that the water layer assists charge diffusion on the dielectric surface.

N-type behavior of ferroelectric-gate carbon nanotube network transistor

Carbon nanotube field effect transistor has attracted much attention recently and is a promising candidate for next generation nanoelectronics. Here, we report our study on a transistor using single wall carbon nanotube network as the channel and a ferroelectric film as the gate dielectric. The spontaneous polarization of ferroelectric materials offers nonvolatility and controllability of the surface charges. Modulation of >102 in the channel conductivity has been observed in the network-based transistor. Voltage pulses are used to control the transistor states; no continuous gate bias is needed. Furthermore, n-type behavior of the network channel is observed, which is attributed to a change in the Schottky barrier at the carbon nanotube-metal interface.

Comprehensive Laser Sensitivity Profiling and Data Register Bit-Flips for Cryptographic Fault Attacks in 65 Nm FPGA

FPGAs have emerged as a popular platform for security sensitive applications. As a practical attack methodology, laser based fault analyses have drawn much attention in the past years due to its superior accuracy in fault perturbation into security-critical Integrated Circuits (ICs). However, due to the insufficient device information, the practical injections work are not so efficient as expected. In this paper, we thoroughly analyze the laser fault injections to data flip-flops, instead of the widely studied configuration memory bits, of a modern nanoscale FPGA. A profiling campaign based on laser chip scan is performed on an exemplary 65 nm Virtex-5 FPGA, through the delayered silicon substrate, to identify the laser sensitivity distribution of the resource array and the fundamental logic cells. The sophisticated flip-flop bit flips are realized by launching fine-grained laser perturbations on an identified Configurable Logic Block (CLB) region. The profiled laser fault sensitivity map to FPGA resource significantly facilitate high-precision logic navigation and fault injection in practical cryptographic fault attacks. We show that the observed single- and multiple-bit faults are compatible with most proposed differential or algebraic fault analyses (DFA/AFA). Finally, further discussions on capability of reported fault models to bypass fault countermeasures like parity and dual-rail logic are also given.

Study of Carbon Nanotube Based Devices Using Scanning Probe Microscope

Since the discovery in 1991 [1], carbon nanotube (CNT) has gained widespread attention. Many researchers have been uncovering the charaterizatics of this 1D material which pos‐ sesses excellent electrical, mechanical and chemical properties. Single walled CNT has a di‐ ameter ranging from 3 A to a few nanometer, which makes the fabrication and charaterization of CNT based devices much more difficult. There is a need for techniques that are suitable for nanometer scale charaterizations for better understanding of CNT based devices. Atomic force microscope (AFM) is powerful equipment for this purpose. In its basic mode of operation, it can reveal the morphology of CNT based devices with nanometer res‐ olution. Moreover, various enhanced modes of operation make it possible to investigate the different properties of CNT as well as the performance of CNT based devices. In this chap‐ ter, we focus on two similiar techniques: electrostatic force microscpy (EFM) and Kelvin probe force microscpy (KPFM, alson know as scanning Kelvin probe microscopy (SKPM)). We will introduce the operation principles of these two techniques and review our recent studies on CNT using EFM. Studies conducted by other groups are also reviewed.

Extensive Laser Fault Injection Profiling of 65 nm FPGA

Fault injection attacks have been widely investigated in both academia and industry during the past decade. In this attack approach, the adversary intentionally induces computational faults in the security components of the integrated circuit (IC) for deducing the confidential information processed or stored inside the device. However, the internal architecture of real-world devices is typically unknown to the attacker and the insufficient information about the device internals often cannot satisfy requirements of a practical fault injection attack. In this paper, we target Field Programmable Gate Array (FPGA) that is widely used in hardware security applications. By analyzing the faulty outputs of implemented algorithms, the scale of logic arrays and the sensitive logic cells can be precisely profiled. Using the outcome of this work, practical attacks can be significantly accelerated, without a need of time-consuming chip-scale injection scan. In addition, the observed fault models are compatible with most of the previously proposed fault models for differential or algebraic fault attacks (DFA/AFA). Moreover, a low-cost and highly sensitive logic-level countermeasure for predicting the laser fault injection attempt is described, which can be applied into any digital IC with a minimal overhead.