Hoda S. Abdel-Aty-Zohdy

Reinforcement learning neural network circuits for electronic nose

This paper approaches electronic nose design from two promising angles: reinforcement neural network (RNN) learning algorithms, and naturally compatible analog circuits. This approach is inspired by biological sensing and discrimination of a multitude of odors in a background environment. A VLSI system approach is presented for classification of chemical compounds, with knowledge of key features only. Based on utilizing microsensor arrays, reinforcement neural networks are used to affect nonparametric pattern recognition, classification, and distinction among multicomponent chemicals. A specialized RNN approach is chosen. Realization and implementation of analog RNN circuits is presented using 1.2 /spl mu/m CMOS n-well technology, at AMI, through the MOSIS facilities. Preliminary results are satisfactory and lend evidence to the effectiveness of the analog designed neural network building blocks for temporal and spatial NN pattern recognition.

Combinational logic approach for implementing an improved approximate squaring function

The Viterbi algorithm is a fundamental signal-processing technique used in different communication systems. An improved, implemented, and tested approximate squaring function for the Viterbi algorithm is introduced in this paper. The implementation of this improved squaring function is based on combinational logic design. The performance of this new approach has been verified by implementing a 7-bit squaring function chip in a 2-/spl mu/m CMOS technology. The active integrated circuit area of the chip was 380/spl times/400 /spl mu/m/sup 2/, and the delays through this area were 5.7 and 3.0 ns for rising and falling edges, respectively. Compared with a previous design, this approach reduces error associated with approximation, simplifies the complexity of realization, reduces the integrated circuit area by at least 40%, and increases the speed by about 100%.

A recurrent dynamic neural network approach and implementation, for noise-contaminated signal representation

This paper presents a new Recurrent Dynamic Neural Network (RDNN) approach and its implementation in order to solve noisy signal representation, processing, and compression. Essentially, the neural net solves, in a systematic recurrent way, simultaneous sets of uncertain and even noise corrupted linear or nonlinear equations, by seeking a corresponding minimum energy state. The VLSIC hardware design and implementation are built around asymmetric Cellular Neural Network (CNN) architecture. Digital semi-custom circuit design is used to implement each CNN building block, using CMOS 2-/spl mu/m n-well technology, and employing available standard cell library. The overall dimensions of the implemented CNN is 3.1/spl times/2.5 mm/sup 2/. Time domain simulation using IRSIM, gave an expected throughput rate of 33 M operations per second. The perceived advantages over traditional approaches are: robustness of computation, ability to confront dynamic (time-varying), as well as noisy signals, flexibility in implementation, and quick turn-around design time.

Artificial neural network electronic nose for volatile organic compounds

Advanced microsystems that include, sensors, interface-circuits, and pattern-recognition integrated monolithically or in a hybrid module are needed for civilian, military, and space applications. These include: automotive, medical applications, environmental engineering, and manufacturing automation. ASICs with Artificial Neural Networks (ANN) are considered in this paper, with the objective of recognizing air-borne volatile organic compounds, especially alcohols, ethers, esters, halocarbons, NH/sub 3/, NO/sub 2/, and other warfare agent simulants. The ASIC inputs are connected to the outputs from array-distributed sensors which measure three-features for identifying each of four chemicals. A Specialized Reinforcement Neural Network (RNN) learning approach is chosen for the chemicals classification problem. Hardware implementation of the RNN is presented for 2 /spl mu/m CMOS process, MOSIS chip. Design implementation and evaluation are also presented.

Reinforcement neural learning with application to gas sensors

Neural net reinforcement learning algorithm and its application to gas (chemicals) classification and quantification are considered in this paper. The approach does not require memory and has simplified reward/punishment computations. The advantages and disadvantages of the reinforcement algorithm are contrasted against other competing neural algorithms. The reinforcement learning has been found practical, when each gas (chemical) is distinguished by several features and characteristics with possible overlap. The paper also gives an account of integrated circuit digital chip implementation for typical four gases with temperature, pressure, and flow quantity features. The number of required iterations has been found to depend on reward and penalty parameters, as well as the threshold governing the learning. It is believed that our implementation approach has potential uses in auto industry safety and emission control, as well in automated semiconductor manufacturing process.

A hardware implementation of genetic algorithms for measurement characterization

To process/store/analyze signals acquired from sensors, hybrid systems with flexible and adaptable intelligent information processing and perception (IIPP) are needed. Genetic algorithms (GA) present a suitable pre-processing operation because of their good convergence to optimum solutions and characterization capabilities. Most GAs are built via software because of their ease of editing and customization. Less attention has been given to hardware implementation of such algorithms. We present a hardware design approach of a GA for optimum measurement representation/characterization to a following IIPP stage. A multilevel verification of the GA is performed via VHDL. In particular the design of efficient universal multipliers and dividers is addressed. A new time efficient approach for crossover based on preassigned least error value is proposed. The crossover scheme is called half siblings and a clone. Such a scheme needs 10 iterations to converge the system proposed for sensor measurement characterization. This takes 7680 clock cycles, which is only 96 /spl mu/sec when implemented in the 0.25 /spl mu/m CMOS technology.

Electronic nose inhibition in a spiking neural network for noise cancellation

An olfaction detection spiking neural network that detects binary odor patterns is analyzed and implemented. This paper presents a new method for inhibiting spiking neural networks by modulating a detection threshold. Interference noise from active odors is measured by a single inhibitory neuron. The inhibition neuron changes the detection threshold to create tolerance for a system with multiple odors present. A digital implementation of the inhibition is simulated. Comparative results prove that threshold modulation reduces false-positive detection error in high noise scenarios where fifteen odors are active simultaneously.

Digital neural processing unit for electronic nose

In a biological nose, the environment usually suggests a number of common odors. The classification process checks sensed information against existing knowledge. This similarity with Reinforcement Learning neural networks suggests challenging implementation problems. A VLSIC digital design and implementation of a Reinforcement Artificial Neural Network (RANN) for chemical classification, in an electronic nose is presented. The chip is designed to classify chemical gases among four possible volatile organic compounds. The system consists of four neurons and twelve synapses. A neuron has been implemented on a tiny chip, using 2.0 /spl mu/m n-well CMOS technology, at Orbit Semiconductors, through the MOSIS facilities. Simulation results demonstrated proper operation. Standalone experiments are satisfactory, with off-chip weight storage and weight update. Electronic nose system testing is under way.

VLSI implementation of a feature mapping neural network

Modification of Kohonens self-organizing feature map algorithm and its dedicated parallel hardware implementation are the focus of this paper. This work is motivated by the need to implement a 5/spl times/5 neural network using digital standard cells and high level VLSI system design tools. The neural net considered is a two layered, feed forward architecture that learns relationships among unknown input data patterns. The prototype system consists of 25 processing units (neurons). Each processing unit operates at 10 MHz. Communication among processing units is accomplished using a broadcast bus. Performance of the system is estimated to be 110,000 iterations per second.<<ETX>>

Compact high gain CMOS op amp design using comparators

This paper discusses the design of high gain, general purpose op amps. The op amp is based on a novel cascaded design using comparators and with structural simplicity approaching that of digital circuits. Ideally, the design tool presented here can be used to optimize gain and CMRR independent of the other op amp performance parameters. The designed op amp has 140 dB open-loop gain and 43 MHz unity gain frequency (GBW) in Berkeley Spice3f Level-2 simulation. The circuit is implemented using a 2.0 μm nwell CMOS process through MOSIS. The op amp is self-biased and requires only power supplies of ±2.5 V. It occupies an area of 113 μm×474 μm.