Holger Bock Axelsen

Principles of a reversible programming language

The principles of reversible programming languages are explicated and illustrated with reference to the design of a high-level imperative language, Janus. The fundamental properties for such languages include backward as well as forward determinism and reversible updates of data. The unique design features of the language include explicit post-condition assertions, direct access to an inverse semantics and the possibility of clean ({\ie}, garbage-free) computation of injective functions. We suggest the clean simulation of reversible Turing machines as a criterion for computing strength of reversible languages, and demonstrate this for Janus. We show the practicality of the language by implementation of a reversible fast Fourier transform. Our results indicate that the reversible programming paradigm has fundamental properties that are relevant to many different areas of computer science.

Reversible arithmetic logic unit for quantum arithmetic

This communication presents the complete design of a reversible arithmetic logic unit (ALU) that can be part of a programmable reversible computing device such as a quantum computer. The presented ALU is garbage free and uses reversible updates to combine the standard reversible arithmetic and logical operations in one unit. Combined with a suitable control unit, the ALU permits the construction of an r-Turing complete computing device. The garbage-free ALU developed in this communication requires only 6n elementary reversible gates for five basic arithmetic–logical operations on two n-bit operands and does not use ancillae. This remarkable low resource consumption was achieved by generalizing the V-shape design first introduced for quantum ripple-carry adders and nesting multiple V-shapes in a novel integrated design. This communication shows that the realization of an efficient reversible ALU for a programmable computing device is possible and that the V-shape design is a very versatile approach to the design of quantum networks.

Reversible machine code and its abstract processor architecture

A reversible abstract machine architecture and its reversible machine code are presented and formalized. For machine code to be reversible, both the underlying control logic and each instruction must be reversible. A general class of machine instruction sets was proven to be reversible, building on our concept of reversible updates. The presentation is abstract and can serve as a guideline for a family of reversible processor designs. By example, we illustrate programming principles for the abstract machine architecture formalized in this paper.

Reversible Flowchart Languages and the Structured Reversible Program Theorem

Many irreversible computation models have reversible counterparts, but these are poorly understood at present. We introduce reversible flowcharts with an assertion operator and show that any reversible flowchart can be simulated by a structured reversible flowchart using only three control flow operators. Reversible flowcharts are r- Turing-complete, meaning that they can simuluate reversible Turing machines without garbage data. We also demonstrate the injectivizationof classical flowcharts into reversible flowcharts. The reversible flowchart computation model provides a theoretical justification for low-level machine code for reversible microprocessors as well as high-level block-structured reversible languages. We give examples for both such languages and illustrate them with a lossless encoder for permutations given by Dijkstra.

Towards a reversible functional language

We identify concepts of reversibility for a functional language by means of a set of semantic rules with specific properties. These properties include injectivity along with local backward determinism, an important operational property for an efficient reversible language. We define a concise reversible first-order functional language in which access to the backward semantics is provided to the programmer by inverse function calls. Reversibility guarantees that in this language a backward run (inverse interpretation) is as fast as the corresponding forward run itself. By adopting a symmetric first-match policy for case expressions, we can write overlapping patterns in case branches, as is customary in ordinary functional languages, and also in leaf expressions, unlike existing inverse interpreter methods, which enables concise programs. In patterns, the use of a duplication/equality operator also simplifies inverse computation and program inversion. We discuss the advantages of a reversible functional language using example programs, including run-length encoding. Program inversion is seen to be as lightweight as for imperative reversible languages and realized by recursive descent. Finally, we show that the proposed language is r-Turing complete.

Clean translation of an imperative reversible programming language

We describe the translation techniques used for the code generation in a compiler from the high-level reversible imperative programming language Janus to the low-level reversible assembly language PISA. Our translation is both semantics preserving (correct), in that target programs compute exactly the same functions as their source programs (cleanly, with no extraneous garbage output), and efficient, in that target programs conserve the complexities of source programs. In particular, target programs only require a constant amount of temporary garbage space. The given translation methods are generic, and should be applicable to any (imperative) reversible source language described with reversible flowcharts and reversible updates. To our knowledge, this is the first compiler between reversible languages where the source and target languages were independently developed; the first exhibiting both correctness and efficiency; and just the second compiler for reversible languages overall.

A reversible processor architecture and its reversible logic design

We describe the design of a purely reversible computing architecture, Bob, and its instruction set, BobISA. The special features of the design include a simple, yet expressive, locally-invertible instruction set, and fully reversible control logic and address calculation. We have designed an architecture with an ISA that is expressive enough to serve as the target for a compiler from a high-level structured reversible programming language. All-in-all, this paper demonstrates that the design of a complete reversible computing architecture is possible and can serve as the core of a programmable reversible computing system.

A simple and efficient universal reversible Turing machine

We construct a universal reversible Turing machine (URTM) from first principles. We take a strict approach to the semantics of reversible Turing machines (RTMs), under which they can compute exactly all injective, computable functions, but not non-injective ones. The natural notion of universality for RTMs is RTM-universality, where programs are considered part of both input and output of a URTM. The machine described here is the first URTM which does not depend on reversibilizing any existing universal machine. The interpretive overhead of the URTM is limited to a (program dependent) constant factor slowdown, with no other complexity-wise cost wrt time and space. The URTM is also able to function as an inverse interpreter for RTMs at no asymptotic cost, simply by reversing the string representing the interpreted machine.

PARALLELIZATION OF REVERSIBLE RIPPLE-CARRY ADDERS

The design of fast arithmetic logic circuits is an important research topic for reversible and qnantum computing. A special challenge in this setting is the computation of standard arithmetical functions without the generation of garbage. Here, we present a novel parallelization scheme wherein in parallel k-bit reversible ripple-carry adders are combined to form a reversible ink-bit ripple-block carry adder with logic depth O(m + k) for a minimal logic depth O(Vmk), thus improving on the nik-bit ripple-carry adder logic depth O(m · k). The underlying mechanisms of the parallelization scheme are formally proven correct. We also show designs for garbage-less reversible comparison circuits. We compare the circuit costs of the resulting ripple-block carry adder with known optimised reversible ripple-carry adders in measures of circuit delay, width, gate, transistor count, and relative power efficiency, and find that the parallelized adder offers significant speedups at realistic word sizes with modest parallelization overhead.

Reversible representation and manipulation of constructor terms in the heap

We currently have limited understanding of how complex data (e.g. algebraic data types) can be represented and manipulated in reversible machine code, in particular without generating garbage. In this paper we present methods for representing and manipulating binary trees (constructor terms) in the heap of a reversible machine. We also give methods for enforcing the so-called first-match policy for a simplified version of the recent reversible functional language RFUN by Yokoyama et al., and simple methods to support let-calls via stack environments.