Hong Jeong

VLSI architecture for MRF based stereo matching

As a step towards real-time stereo on 2D markov random field (MRF), we will present fast belief propagation (FBP) VLSI architecture for stereo matching, which has a parallel, distributed and memory-efficient structure and lowest error rates among the real-time systems. FBP can reduce memory complexities by 17 times smaller than belief propagation (BP) and output 320x240 disparity image of 32 levels with 320 parallel processors on 2 Xilinx FPGAs at 30 frames/s. Multiple chips can be cascaded to increase computation speed due to its linear array architecture. Our structure is more adequate for high resolution and real-time applications like 3D video conference, multi-view coding and 3D modelling.

Generalized trellis stereo matching with systolic array

We present here a real time stereo matching chip which is based on a general trellis form with vergent optical axis. The architecture can deal with general axis angle of cameras with better resolution in given space. For a pair of images with M × N pixels, only

Vision-based adaptive and recursive tracking of unpaved roads

\mathcal{O}(MN)

Trellis-based parallel stereo matching

time is required. The design is highly scalable and fully exploits the concurrent and configurable nature of the algorithm. We implement stereo chip on Xilix FPGA with 208 PEs(Processing Elements) that can obtain disparity range of 208 levels. It can provide the real-time stereo matching for the mega-pixel images.

High-speed parallel very large scale integration architecture for global stereo matching

We present an approach to road recognition based on Kalman filtering and EM theory resulting in a fast recursive filter that can adaptively track unpaved roads. The road model uses linear dynamic equations and an ANN front end detects road boundaries. Kalman filters construct search neighborhoods and adapt the ANN to road conditions. The road model adapts to motion dynamics using EM. Experimental results are presented.

Cost Aggregation Table: Cost Aggregation Method Using Summed Area Table Scheme for Dense Stereo Correspondence

We present a center-referenced basis for discrete representation of stereo correspondence that includes new occlusion nodes. This basis improves the inclusion of constraints and the parallelism of the final algorithm. Disparity estimation is formulated in a MAP context and natural constraints are incorporated, resulting in an optimal path problem in a sparsely connected trellis. Like other dynamic programming methods, the computational complexity is low at O(MN/sup 2/) for M/spl times/N pixel images. However, this method is better suited to parallel solution, scaling up to O(MN) processors. Experimental results confirm the performance of this method.

Memory-efficient iterative process on a two-dimensional first-order regular graph

Abstract. Although stereo matching algorithms based on beliefpropagation (BP) tend to show excellent matching performance,their huge computational complexity has been the major barrier toreal-time applications. In this light, we propose a parallel very largescale integration (VLSI) architecture for BP computation, which hasonly simple integer operations and shows low matching error rate forthe Middlebury database.

Trellis-based systolic multi-layer stereo matching

The stereo matching algorithms usually do not satisfy the performance of both accuracy and complexity. The semi-global matching (SGM) is the most efficient method among the stereo matching algorithms. However, it still does not utilize the whole image information to estimate the disparity values. In this paper, we proposed a new concept of the cost aggregation method using summed area table (SAT) scheme. The SAT is the efficient algorithm for summing intensities on the rectangular area in the image. Using four kinds of the SAT arrays (we called these arrays cost aggregation table (CAT)), it is possible to estimate the disparity values with aggregating every cost in the image. We tested our algorithm using the KITTI vision benchmark suite, the result shows that our algorithm is superior for disparity accuracy compared to the SGM. We expect that the CAT can be an alternative cost aggregation method to the SGM in the near future.

A parallel real time implementation of stereo matching

We present a parallel and memory-efficient iterative algorithm based on 2D first-order regular graphs. For an M x N regular graph with L iterations, a carefully chosen computation order can reduce the memory resources from O(MN) to O(ML). This scheme can achieve a memory reduction of 4 to 27 times in typical computation-intensive problems such as stereo and motion.

Adaptive Parallel Computation for Blind Source Separation with Systolic Architecture

Stereo vision is the process of recreating 3D spatial information from a pair of 2D images. We propose a multi-layer stereo vision algorithm and architecture which makes it possible to match two images in real time, without rectification of the image (rectification means making the scan line parallel to the epipolar line). To solve the epipolar problem, the self calibration method searches for a pixel within several lines of one image corresponding to a pixel on the scan line of the other image. We also propose a subpixel multi-layer system which considers subpixel data. It is useful for stereo matching of images with high frequency bandwidth characteristics. The total time complexity is O(N) so that real time processing is possible. The hardware architecture is a simple linear systolic array suitable for ASIC. The hardware design is verified by simulation, and it is confirmed that this system can process typical video image sequences in real time.